2023-07-18 07:17 PM
Hello everyone! I have been reading the user manual for the u575 processor and found out that there was a cache memory there. But I have absolutely no clue how does it work and how to implement its support in code. Does anyone know any article or something which explains how that cache work and how to implement its use in code?
Thank you!!
2023-07-19 01:07 AM
Hi @Skfir ,
The STM32U5 embeds an instruction cache (ICACHE) and a data cache (DCACHE).
The ICACHE is introduced on C-AHB code bus of Cortex-M33 processor to improve performance when fetching instruction and data from internal and external memories.
The DCACHE is introduced on S-AHB system bus of Cortex-M33 processor, or on an AHB bus driven by a master peripheral, to improve the performance of data traffic to/from external memories only.
Depending on which STM32U5 you have the features of ICACHE and DCACHE might be different. Here are the features for STM32U575 devices.
Now to learn how to use them on the most efficient way for your application, please find attached the application notes AN5212 "Using STM32 cache to optimize performance and power efficiency".
Best regards,
Aime