Hi all,
(STM32U575..) we have the SRAM2 ECC active on reset by the according configuration of the flash option byte.
For testing purpose I switch off the ECC by using the HAL_RAMCFG_StopECC(&hramcfg_SRAM2), manipulate one cell for a one bit error and another cell for a two bit error and switch on the ECC by using the HAL_RAMCFG_StartECC(&hramcfg_SRAM2). After switching on the ECC on SRAM2 the content of the SRAM2 section is lost/random.
Why is the content of SRAM2 lost on switching on ECC again? I did not found any remark within the Errata or the Reference manual.
If I do the same procedure for ECC testing with BKPSRAM or with SRAM3 the content after enabling again the ECC is still there and on reading the manipulated cells, the expected ECC interrupt is triggered.
best regards,
PScal
