2020-08-04 09:00 PM
Hi all
I'm triying using DMA to receive UART.
But the number of UART data is depending on the situation.
So I want to set a CNDTR register with margin.
I was wondering that I can stop DMA before CNDTR is zero.
When DMA Enable bit is cleared, it seem that don't stop immediately.
I think that the cause is that CNDTR is not zero.
But I want to stop DMA before CNDTR is zero.
Is there way to solve it?
Regards,
2020-08-04 10:34 PM
Which STM32?
> When DMA Enable bit is cleared, it seem that don't stop immediately
Why do you think so?
It just finishes the last transaction if it already started.
JW
2020-08-04 11:48 PM
>Which STM32?
I'm using Nucleo-G071RE.
CNDTR is set with margin(Because data size is not constant)
I took test by 256Bytes date with break(Break is mark of data starting).
And I coded that when I recieve break, DMA data receive pointer and CNDTR reset, then receive restart.
When I set 256Bytes to CNDTR, it worked properly.
When I set more than 256Byte to CNDTR, it does'nt work as expected.
2020-08-05 08:57 PM
In your example, when it "works", the data becomes 0, 0, 0, ...
When it "doesn't work", the data is 0, 1, 2, ...
Since you're sending 0, 1, 2, ..., that statement seems backwards to me.
Writing EN=0 definitely disables the stream.
2020-08-05 10:49 PM
In this test situation, 1 packet is 256Bytes.
I programmed that when it received 256Bytes, then En = 0 , then data pointer set to "Buffer adr = 0" , CNDTR is reset(256 or more than 256), En = 1.
So, My expected result is that there is no data above "Buffer Adrs = 256".
I was wondering that result depending on CNDTR.
2020-08-06 03:16 AM
Okay, that makes more sense.
It should work as you expect. When EN=0, the DMA is off. There's likely a bug in the code somewhere.
2020-08-06 06:10 AM
Thank for you replying.
I'll check my code again.