How to select ADC clock source for STM32L476RG

[watt_up]

I have been reading the RM0351 trying to figure out how to setup the clock source for the ADC.
The reference manual says that I could choose the system clock, PLLSAI1, or the PPLSAI2
as the asynchronous clock source for the ADC (see figure 1). It also shows that there is a mux that I presume allows the programmer to select between the three clocks. I am trying to configure the ADC at the register level (just for fun) but my problem is that I can't seem to find any information on the registers that controls the MUX to select between the 3 clocks mentioned above. I thought for sure the MUX must exist because the STM32CubeIDE even shows it in the ".ioc" GUI under clock configuration (see figure 3).

How do I select between the three clock sources mentioned above using register level manipulation?

Figure 1: Reference manual stating users can choose between  system clock, PLLSAI1, or the PPLSAI2
as the asynchronous clock source for the ADC

Figure 2 Refence manual showing a MUX to choose ADC clock source.

Figure 3: STM32CudeIDE showing the MUX to select ADC clock source.

[waclawek.jan]

I don't have the RM open at the moment, but search for ADC  in the RCC registers description.

JW

[AScha.3 · Accepted solution]

you set it in Cube....dont trust in Cube ?

ok, set registers...RCC_CCIPR -> ADCSEL 2b

[watt_up]

Thank you its there indeed. Boy... I wasted a lot of time looking for that register. Maybe I'll use the Cube next time :)

May I ask how did you know its there?

[watt_up]

Thank you for your response. How did you know to look there?

[waclawek.jan]

Cube (more precisely, CubeMX) won't tell you where that register is, either. You are supposed to click and trust :)

JW

[waclawek.jan]

> How did you know to look there?

The problem is, that STM32 are SoC thrown together from modules, and the "thrown together" part is poorly explained. That's what "product level" means - the ADC chapter's author does not know and does not care how will the async clock be generated.

For years I am trying to explain ST that they need to clearly, unambiguously, using uniform terminology and signals/registers naming, explain *all* internal interconnections, i.e. the Interconnections chapters in RMs (not in all, only newer STM32 RMs have it) are grossly inadequate.

So, we can call it experience, I guess.

JW

[AScha.3]

to be true : i didnt know.

where would you put it, if building such a cpu ?

to clock/control module or peripheral . so i looked at ADC...but there only presale and clockmode, so look at RCC .

there most registers about enable and reset, not much remains...to see: periph...config.  :)

and yes, as Jan explained, you should be aware, that such a cpu is build from some modules, that may come even from different companies, like USB from Synopsys , and then you look, where are they "glued together" , like the clock tree.