2020-03-31 01:56 AM
Hi,
I am using an STM32F407VGx MCU and I am trying to receive data from SPI1 using DMA.
STM32CubeIDE generated code for the SPI1 is the following:
void MX_SPI1_Init(void)
{
LL_SPI_InitTypeDef SPI_InitStruct = {0};
LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
/* Peripheral clock enable */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1);
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
/**SPI1 GPIO Configuration
PA4 ------> SPI1_NSS
PA5 ------> SPI1_SCK
PA6 ------> SPI1_MISO
PA7 ------> SPI1_MOSI
*/
GPIO_InitStruct.Pin = LL_GPIO_PIN_4|LL_GPIO_PIN_5|LL_GPIO_PIN_6|LL_GPIO_PIN_7;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* SPI1 DMA Init */
/* SPI1_RX Init */
LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_0, LL_DMA_CHANNEL_3);
LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_0, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_0, LL_DMA_PRIORITY_VERYHIGH);
LL_DMA_SetMode(DMA2, LL_DMA_STREAM_0, LL_DMA_MODE_NORMAL);
LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_0, LL_DMA_PERIPH_NOINCREMENT);
LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_0, LL_DMA_MEMORY_INCREMENT);
LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_0, LL_DMA_PDATAALIGN_BYTE);
LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_0, LL_DMA_MDATAALIGN_BYTE);
LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_0);
SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX;
SPI_InitStruct.Mode = LL_SPI_MODE_SLAVE;
SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_8BIT;
SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW;
SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
SPI_InitStruct.NSS = LL_SPI_NSS_HARD_INPUT;
SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
SPI_InitStruct.CRCPoly = 10;
LL_SPI_Init(SPI1, &SPI_InitStruct);
LL_SPI_SetStandard(SPI1, LL_SPI_PROTOCOL_MOTOROLA);
}
while this is my additional code to set memory size and address of the memory buffer:
unsigned char sp1_tc;
unsigned char spi1_rx_buff[10];
void MX_SPI1_DMA_Addr_Size_Init(void)
{
/* SPI1_RX => DMA2, LL_DMA_STREAM_0, LL_DMA_CHANNEL_3 */
LL_DMA_SetDataLength(DMA2, LL_DMA_STREAM_0, sizeof(spi1_rx_buff));
LL_DMA_SetMemoryAddress(DMA2, LL_DMA_STREAM_0, (unsigned) &spi1_rx_buff);
LL_DMA_SetPeriphAddress(DMA2, LL_DMA_STREAM_0, LL_SPI_DMA_GetRegAddr(SPI1));
LL_DMA_EnableIT_TC(DMA2, LL_DMA_STREAM_0);
LL_DMA_EnableStream(DMA2, LL_DMA_STREAM_0);
LL_SPI_EnableDMAReq_RX(SPI1);
LL_SPI_Enable(SPI1);
}
ISR:
void DMA2_Stream0_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream0_IRQn 0 */
if(LL_DMA_IsActiveFlag_TC0(DMA2))
{
LL_DMA_ClearFlag_TC0(DMA2);
sp1_tc = 1;
}
/* USER CODE END DMA2_Stream0_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream0_IRQn 1 */
/* USER CODE END DMA2_Stream0_IRQn 1 */
}
However, I am unable to correctly receive the stream basically because I never detect spi1_tc as 1. Debugging the core also always shows nothing.
DMA2 is also used for USART1 (Stream 2 on RX, Stream 7 on TX).
So what's wrong in my setup ?
Thanks.
s.
Solved! Go to Solution.
2020-03-31 02:13 AM
Solved. The trick is to temporally disable the stream and re-enable it once the job on the buffer is done.
s.
2020-03-31 02:13 AM
Solved. The trick is to temporally disable the stream and re-enable it once the job on the buffer is done.
s.