How to improve the firmware to prevent ESD discharge.

[CGren.1]

Hello,

The system has a MCU STM32L151 and here the details.

ESD testing + / - 15 KV contact on the box enclosure. PCB is inside and the ground frame is connected to the board and box.

F/W Test: 

I performed ESD test in STOP mode only. The lock is always in sleep when I zap the box.

I noticed interesting behavior.

Here are my notes:

1. I got always a pin reset following by independent watchdog after a couple of seconds. The board restarts correctly after these 2 resets. In my test F/W, I enabled the IWDG.
2. I changed the test f/w to see why I got a IWDG. And, after a moment, I pointed to LSI is never ready. 
3. We thought it was the LSE was never ready. It’s not the case. 
4. LSI is the clock used for the independent watchdog. 
5. I don’t understand why we got a independent watchdog if the LSI is never ready. Also, in the firmware, the IWDG is configured later after the LSI initialization.
6. After a IWDG reset, it seems that the system is going well. 
7. I don’t understand the ESD behavior on NRST (pin reset). Is it possible that something is not correctly initialized caused by the pin reset(NRST) and could explain weird behavior on LSI and IWDG.

To solidify the firmware, we need to understand each problem independently and see the best thing to do. And now, I am confused! I am not sure to apply a solution in PVD could fix it.  

It's possible to change the hardware or mechanical stuff. But, I would like to see if you can improve the firmware to prevent any problem also.

Any ideas?

Thanks

Christian

[CGren.1]

up

[TDK]

The chip is not safe to 15 kV by itself. If you need that level of protection, you will need to add external ESD protection chips.

ESD is not a problem you can solve in firmware. It is a hardware issue.

[CGren.1]

​My last tests were done at 15 KV but I already got issues at +/- 8 KV.  The same symptoms occurred at +/- 15 KV and faster!

[TDK]

Why are you expecting a chip that is rated to 2kV to survive a 15kV shock?