The reference manual RM0440, revision 7, in section "44.3.2 Operating modes", in the last paragraph of subsection titled "CAN FD operation states" states that:
In case a FDCAN Tx buffer is configured for FDCAN transmission with DLC > 8, the first eight bytes are transmitted as configured in the Tx buffer while the remaining part of the data field is padded with 0xCC. When the FDCAN receives a FDCAN frame with DLC > 8, the first eight bytes of that frame are stored into the matching Rx FIFO. The remaining bytes are discarded.
What does it mean? Does it really mean that no message longer than 8 B can be transfered to and from the MCU? Why?
