How do I correctly enable LSI for low power cnsumption in STM32G031? HAL seems not to work. :/

[DFran.9]

Hey there!

I am using a STM32G031 and want to reduce power consumption to <100 µA. So I have to use LSI as System Clock. I configured STM32Cube to use LSI as System Clock and MCU runs on LSI. BUT: Current is 10 mA. Before I configured HSI Low Power Mode at 1 MHz and consumption was 250µA.

I figured out, that CubeMX doesn't disable HSI Clock, so this was done by me manually. But there wasn't a great reduce of current consumption. Now it is at 9.8 mA.

I also tried to configure clock manually in a minimalistic program, but no success:

int main(void)
{
  /* Enable LSI */
  SET_BIT(RCC->CSR, RCC_CSR_LSION);
 
  /* Check if LSI is ready */
  while (!READ_BIT(RCC->CSR, RCC_CSR_LSIRDY)){
	  __NOP();
  }
 
  /* Switch to LSI as SysClock */
  SET_BIT(RCC->CFGR, RCC_CFGR_SW_0);
  SET_BIT(RCC->CFGR, RCC_CFGR_SW_1);
  // changed to WRITE_REG(RCC->CFGR, (READ_REG(RCC->CFGR) & ~(RCC_CFGR_SW_2)) | RCC_CFGR_SW_1 | RCC_CFGR_SW_0);
 
  /* Disable HSI */
  CLEAR_BIT(RCC->CR, RCC_CR_HSION);
 
  /* Check if HSI is off */
  while (READ_BIT(RCC->CR, RCC_CR_HSIRDY)){
  	  __NOP();
  }
 
  /* Startup Delay */
  for (uint32_t i = 8000; i != 0; i--){
	  __NOP();
  }
 
  while (1)
  {
	__NOP();
  }
}

Also 9.7 mA.

Does someboddy has an advice? Thank you :)

[waclawek.jan]

Read out and check RCC_CSR and RCC_CFGR content.

> SET_BIT(RCC->CFGR, RCC_CFGR_SW_0);

> SET_BIT(RCC->CFGR, RCC_CFGR_SW_1);

No. You have to set the whole bitfield at once. After the first set, you have RCC_CFGR.SW=0b001 which is HSE, but HSE is not running, thus, according to RM,

The setting is forced by hardware to 000 (HSISYS selected) when the MCU exits Stop or

Standby mode, or when the setting is 001 (HSE selected) and HSE oscillator failure is

detected.

JW

[DFran.9]

Thank you for your reply, but this makes no difference.

But I changed it to

/* Switch to LSI as SysClock */
  WRITE_REG(RCC->CFGR, (READ_REG(RCC->CFGR) & ~(RCC_CFGR_SW_2)) | 
RCC_CFGR_SW_1 | RCC_CFGR_SW_0);

Addition: I also checked the registers and RCC->CFGR is 0b011011. So LSI is enabled as Sys Clock.

[DFran.9]

Now, I am running the Example ST delivered for STM32G031 LSI in their repositories and... current consumption is 15 mA.

I assume there is an Hardware problem.

[waclawek.jan]

15mA is indeed shockingly high value, especially if the same application and hardware runs well below 1mA with HSI.

What's the hardware? Is it a"known good" board e.g. Nucleo? If not, can you try on such? And what is the application, i.e. what peripherals are running?

If you try​ a plain blinky, does it show down accordingly to frequency ratio between HSI and LSI?

Are you measuring power consumption with or without debugger connected?

JW​

[DFran.9]

That was exactly my thought too. The hardware runs reliably and more energy-efficiently at higher frequency on HSI oscillator. I also found it very shocking seeing STM's own example breaks all boundaries. Maybe a STM developer will read an comment.

STM-LSI-Example:

 

My HSI LowPower Test:

 

Hardware is an original new STM32G031-Discovery Board. There isn't any peripherlal hardware (besides LED and switch) on the board, only MCU and ST-Link.

I have already tried everything: Blinky, MCO. Clock only. Everything is OK. MCO shows perfect LSI clock at 32 kHz. Better than expected. Measurement with and without Debugger (250 µA HSI measurement was done with Debugger).

Sys Clock LSI 32 kHz:

[waclawek.jan]

This is a primarily user-driven forum, with only casual ST presence. At this point you may want to contact ST directly, through FAE or the web support form.

What is the result of enabling LSI without​ setting it as system clock?

Is there anything related in the Errata?

JW​

[DFran.9]

Ok, I gave a last chance to it, coding completely bare metal. No STM library but register definitions. And: 108 µA. That's still too much, but better than 'nothing'. Now I am wondering what did STM do to get such problems?!?! Also STM LL Templates failed. I will compare RCC registers later.

whole code:

#include <stm32g031xx.h>
 
void main(void){
	/* Enable LSI */
	RCC->CSR |= RCC_CSR_LSION;
	/* Check if LSI is ready */
	while (!(RCC->CSR & RCC_CSR_LSIRDY)){
	}
	/* Switch to LSI as SysClock */
	RCC->CFGR = (RCC->CFGR & ~(RCC_CFGR_SW_2)) | RCC_CFGR_SW_1 | RCC_CFGR_SW_0;
	/* Disable HSI */
	RCC->CR &= ~(RCC_CR_HSION);
	/* Check if HSI is off */
	while (RCC->CR & RCC_CR_HSIRDY){
	}
	/* Loop forever */
	while (1){
	}
}

Thank you for your effort. I will investigate later. When you are interested, have a look, leave a comment, Thanks :)

Addition: Even without switching off HSI, MCU requires only 300 µA.

[Piranha]

After changing the SW bits in CFGR register, the code has to wait until the SWS bits return the same value.