How can I use GPIOx_BSRR register?

[Bilge]

Hi,

I use stm32h743zi nucleo board and I try to GPIOx_BSRR register .This register has two 16 bit registers "BSRRL" and "BSRRH".As I understand BSRRL is used to set bit and then BSRRH is used to reset bit.

GPIOB->BSRRL =(1<<0); to set the zero pin ,but there is an error: #136: struct "<unnamed>" has no field "BSRRL"

[Tesla DeLorean]

GPIOB->BSRR =(1<<0); // PB0 High

GPIOB->BSRR =(1<<16); // PB0 Low

[YAkse]

Hey, I think @Community member​ misunderstood you, I guess BSRRL is used to control the pins 0,1,2,3,4,5,6,7 and BSRRH is used to control pins 8,9,10,11,12,13,14,15. So these two registers works same but targets different I/Os. On the other hand, his answer represents how to use a 32 bit BSRR register.

BSRR registers are operates in such way which is called as atomic operation(or something like that). This simply means that you just send a signal,i.e "1" ,to relevant bit, it understands you and responses then sets itself to "0" again.

So you will use for example to control PB3;

GPIOB.BSRRL |= 1<<3; // TO HIGH

GPIOB.BSRRL |= (1<<3+8) ; //TO LOW

You send a "1"(signal) to 3rd bit to say the MCU, "hey let us make pin 3 HIGH" it does it and then resets the 3rd bit. First half of bits are used to SET and the other half of the bits are used to RESET in BSRR registers(more correctly BSR registers).

[YAkse]

I now checked the reference manual for the stm32h743zi, but there is not any BSRRL and BSRRH registers, there is only one 32bit BSRR register and then all my answer based on there are 2 registers information is wrong. The answer above ( Clive's answer ) then represents how to correctly use a 32-bit BSRR. I will not delete my answer though, in case it may help.

[Tesla DeLorean]

Different STM32 models describe this differently, some have the high/low registers in the structure, some just one 32-bit BSRR.

In all cases, as I recall, the chip can take a 32-bit write, so one atomic write which can set/reset all pins into desired state.

[YAkse]

So if there were 2 registers named as BSRRL and BSRRH ( hypotethically and let them used as I wrote above) , then also in the defines part, are they defining a new BSRR even it wasn't in reference manual? But this time a 16 bit shift should not work because L register accesses only the pins up to 7. Or am i all wrong about this L and H registers. But I must have seen a kind of them in somewhere.

[Bilge]

@Community member​ GPIOB->BSRR =(1<<0); it worked that way, but The use of bsrr register looks like in the picture.There is not error in the program ,but it looks that way.

[Bilge]

@Imen DAHMEN​ first image is generated codes in the stm32cubemx 5.2.1 version ,other older version

[Tesla DeLorean]

The processor can do 8, 16 and 32-bit writes against memory. The structure can only really describe one width, and most compilers don't support unnamed unions, where you could use different names for memory that falls on the same location.

ST has been inconsistent with library code, seem to recall the F3 SPL used the BSRRL/BSRRH naming.

If you wanted to do a 32-bit write against GPIOB->BSRRL you'd need to cast the address to a 32-bit pointer.

[Imen.D]

Hello @Bilge​ ,

Which Cube firmware package are you using ?

In fact, in the last firmware package CubeH7 v1.4, we have replaced BSRRL and BSRRH registers (In device header file (ex. stm32h743xx.h) and in GPIO type def) by one 32 bit register BSRR as defined in Reference manual.

Best Regards,

Imen