H7 power dissipation and lifetime, how to manage?

regjoe · ‎2025-07-09

Hello,

I came across this document here https://www.st.com/resource/en/application_note/dm00622045-stm32h7-series-lifetime-estimates-stmicroelectronics.pdf

We have a H75x custom board running the MCU in VOS1 at 400MHz with external 1.2V core power supply.

According to this description here

According to Figure 2, when VOS1, VDD = 3.3 V, VCORE = 1.2 V and operation ratio of 100%. Some examples are
illustrated such as:
• Tj = 105°C the lifetime estimation is > 10 years
• Tj = 125°C the lifetime estimation is 4 years
• Tj = 140°C the lifetime estimation is 2 years
In the same conditions and for an operation ratio of 20%, the lifetime estimation is as following:
• Tj = 125°C the lifetime estimation is 20 years
• Tj = 140°C the lifetime estimation is 10 years

the power consumption, heat dissipation and lifetime is influenced by "operation ratio". What does operation ratio mean and how can I influence/control it? Does this mean that only a part of chip silicon is powered/used? Or time spent in the idle loop, assuming the MCU is running in lowest VOS mode and/or clock frequency during idle time?

Thanks,

Jochen

Andrew Neil · ‎2025-07-09

So this:

https://www.st.com/resource/en/application_note/dm00622045-stm32h7-series-lifetime-estimates-stmicroelectronics.pdf#page=4

Indeed, the term "operation ratio" is vague and needs proper definition.

I guess it's some sort of "duty cycle": presumably, the 20% indicates the proportion of time operating at the high junction temperature - but what is happening in the other 80% of the time?

Presumably it would also depend on how long the high temperature is maintained?

A complex system that works is invariably found to have evolved from a simple system that worked.
A complex system designed from scratch never works and cannot be patched up to make it work.

Ozone · ‎2025-07-09

> What does operation ratio mean and how can I influence/control it?

I would expect this term to mean the relative time of the system operating at given temperature.
Higher temperatures and higher currents cause electromigration (migration of n-/p- doping atoms), which degrades the die structures over time.
Mind you, these are all statistical measures.
And second, the key temperature here is Tj, not Ta.

regjoe · ‎2025-07-09

I tend to agree with you. After all, this is one of those documents that create more questions than give answers... :)

I wonder what happens to the chip if lifetime is over? MCU clock stutters (but nobody cares about), flash bits are worn out, chip goes up in flames, ...?

So the primary goal in order to save lifetime is to keep the junction temperature below 125°C?

This can be acchieved via power consumption reduction and chip cooling. Latter is hard to do.

Power consumption is proportional to MCU core voltage, clock frequency, active silicon, ...

But is switching VOS levels, frequency and turning on/off temporarily unused peripherals really a practical way to go in an industrial application? I guess most applications nowadays are still running a super loop at VOS0. What happens? Never heard about failing systems due to running at CPU maximum clock speed. Is this only STM business?

Ozone · ‎2025-07-09

> But is switching VOS levels, frequency and turning on/off temporarily unused peripherals really a practical way to go in an industrial application?

Very few industrial applications have an estimated lifespan of 10 years, technological obsolescence usually hits earlier.

Automotive applications are different, they often require qualification at much higher ambient temperatures. And you would need to add about 10 to 30°C between Ta and Tj.

> Is this only STM business?

Certainly not.

regjoe · ‎2025-07-09

Statistics, indeed. For example, what means "lifetime > 10yrs"? 0.01% of samples are damaged after 10 years?

I wonder how we can guarantee that the chip lasts >10 years. What does ST recommend their automotive customers? Run the chip at VOS2/3?

If all depends on junction temperature, how can we measure it? Is it possible to calculate junction temperature from chip chassis temperature? Or calculate it from MCU power consumption? Any easy/practical way to do so?

I guess H7 has an internal temperature channel, but IMHO it has a huge offset and must be calibrated.

In our design the chip is only a couple of °C higher than ambient temperature and I wonder what must be done to make the chip junction temperature rise to a temperature > 100°C. Run the board in a closed isolated chassis at 100°C?

The document refers to the H7 family. Some have a SMPS feature. Does it make a difference to juction temperature if core power is provided by LDO or by external power supply? I guess if powered from LDO the chip is heated up.

Thank you @Andrew Neil @Ozone for your answers.

Andrew Neil · ‎2025-07-09

@regjoe wrote:
If all depends on junction temperature, how can we measure it?

Many processors have an internal temperature sensor

A complex system that works is invariably found to have evolved from a simple system that worked.
A complex system designed from scratch never works and cannot be patched up to make it work.

LCE · ‎2025-07-09

@Andrew Neil wrote:
@regjoe wrote:
If all depends on junction temperature, how can we measure it?
Many processors have an internal temperature sensor

Yes indeed, and I just checked the H723 ref manual:

> 29.4.31 Temperature sensor
> The temperature sensor can be used to measure the junction temperature (Tj) of the device.

If what I see from the internal temperature sensor is half-way close to the real Tj, then I am quite relieved with my typical application:

Tj is at about 15°C above Ta
single core running at 400 MHz
audio streaming via ethernet at about 25 Mbps mostly via DMA
CPU awake about 20% (checked quite precisely with CYCCNT)

Looking at the graph above and estimating Ta max of 50°C, this should work for at least 20 years. :D

Ozone · ‎2025-07-09

> In our design the chip is only a couple of °C higher than ambient temperature and I wonder what must be done to make the chip junction temperature rise to a temperature > 100°C. Run the board in a closed isolated chassis at 100°C?

Leave a vehicle a few hours at >40°C (Southern desert zones), with your H7 MCU on a PCB in a fully encapsulated casing, somewhere under the hood.
This is what "automotive approval" encapsulates - common ambient temperatures of all inhabited zones, and waterproofness of many components (especially electronics).

> Does it make a difference to juction temperature if core power is provided by LDO or by external power supply? I guess if powered from LDO the chip is heated up.

The components will heat up until thermal output and heat dissipation are at equilibrum.
This means, Tj of semiconductors will be above Ta inside the module, and Ta inside the module will be above Ta outside the module. Proper hardware design tools can simulate thermal properties to a certain degree.

Statistics, indeed. For example, what means "lifetime > 10yrs"? 0.01% of samples are damaged after 10 years?

I wonder how we can guarantee that the chip lasts >10 years. What does ST recommend their automotive customers? Run the chip at VOS2/3?

I suspect you would need to contact a ST representative for more details.
Such numbers are usually not discussed openly on public fora.

On a related note, me (and I think Andrew Neil too) are not affiliated with ST, having no access to internal data.

Andrew Neil · ‎2025-07-09

@Ozone wrote:
me (and I think Andrew Neil too) are not affiliated with ST, having no access to internal data.

Indeed.

A complex system that works is invariably found to have evolved from a simple system that worked.
A complex system designed from scratch never works and cannot be patched up to make it work.