Posted on February 20, 2014 at 08:55> [document dealing with] the compensation cells in detail?
None I know of.
Generally, compensation circuitry is used to condition the output stage transistors' operating point to compensate for temeperature, supply voltage and varying load effects. However, the implementation details in the STM32F4xx are to me unknown.
> Is there any good reading on the mechanics of AHB1 with respect to the GPIO ports? I think this could help my understanding of the speed aspect.
This has nothing to do with ''speed'' (output current/slew rate) as such. You might perhaps want to define your notion of ''speed'' more precisely.
> if I'm expecting 10MHz SPI and my MOSI line is setup with GPIOx_OSPEEDR = 2MHz, should I expect trouble?
Not necessarily. The output stage simply consists of several transistors (of different geometry, i.e. different RDSon) in parallel, and the OSPEEDR setting simply determines, how many of them are actually driven. Even if OSPEEDR=2MHz, it just means *some* output impedance, and if the loading capacitance of the connected external circuitry is sufficiently small, the slew rate might be good enough for higher frequency operation. In this place I should direct you to the datasheet (table 49); unfortunately, even in its Rev 4 incarnation (which itself is almost a year old) the interesting values in there are TBD. While in this situation indeed measuring the real-world behaviour is the only instant answer, if you have genuine interest in knowing these things in detail, you must pester ST to yield some solid data. However, as experience shows, they won't move a finger unless you buy in large volume...
JW
