G431 Config of input interrupt prevents timer 8 from working.

[Tobe]

This is one that baffles me:

I set up Timer 8, and everything haasworking perfect. Then i did set up interrupt on some pins, and then the PWM signal on timer 8 stopped working.

This is what i did, so the Timer 8 stopped working:

Edit: Only with the pull UP resistor the problem does not appear.

	my_GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2;
	my_GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING;
	my_GPIO_InitStruct.Pull = GPIO_NOPULL;
	HAL_GPIO_Init(GPIOC, &my_GPIO_InitStruct);

This is how i setup Timer 8:

	// **************** PWM *********************
	// PC6-8
	// PC10-12
	my_GPIO_InitStruct.Pin = 	GPIO_PIN_6 |
								GPIO_PIN_7 |
								GPIO_PIN_8 |
								GPIO_PIN_10 |
								GPIO_PIN_11 |
								GPIO_PIN_12;
	my_GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
	my_GPIO_InitStruct.Pull = GPIO_NOPULL;
	my_GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
	HAL_GPIO_Init(GPIOC, &my_GPIO_InitStruct);
	// Alternative function HIGH register
	GPIOC->AFR[0] |= (	GPIO_AFRL_AFSEL6_2 |  	// AF4 (all)
						GPIO_AFRL_AFSEL7_2);
	// Alternative function LOW register
	GPIOC->AFR[1] |= (	GPIO_AFRH_AFSEL8_2 |	// AF4 (all)
						GPIO_AFRH_AFSEL10_2 |
						GPIO_AFRH_AFSEL11_2 |
						GPIO_AFRH_AFSEL12_2);

SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); 		// Enable TIM8 clock

	CLEAR_REG(TIM8->AF1);	// Disable BKIN input
	CLEAR_REG(TIM8->AF2);

	SET_BIT(TIM8->CR1, 	TIM_CR1_ARPE | 				// preload enable
						TIM_CR1_CMS_1 // center aligned up/down (interrupt on counting up - for ADC trigger only?)
						);

	//TODO: check entries again for pwm
	SET_BIT(TIM8->CR2, TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2); // tim_oc4refc or tim_oc6refc rising edges generate pulses on	tim_trgo2 for ADC trigger

	//TIMx_ARR -1 ist max counter
	WRITE_REG(TIM8->ARR, PWM_WIDTH); // Counter TOP

	// Prescaler TIMx_PSC

	WRITE_REG(TIM8->CCR1, DUTY_TO_PWM(15));	// compare value 1
	WRITE_REG(TIM8->CCR2, DUTY_TO_PWM(30));	// compare value 2
	WRITE_REG(TIM8->CCR3, DUTY_TO_PWM(80));	// compare value 3

	WRITE_REG(TIM8->CCR4, PWM_WIDTH - ADC_TRIG_PRE_COUNT);	// compare value 4 (ADC trigger)

	//The UEV update event can be disabled by software by setting the UDIS bit in the TIMx_CR1


	SET_BIT(TIM8->CCMR1, 	TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1	| // pwm output compare polarity channel 1 and 2 (pwm mode 1)
							TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC2M_1	);
	SET_BIT(TIM8->CCMR1, 	TIM_CCMR1_OC1PE  | TIM_CCMR1_OC2PE); 	// preload enable ccr 1 + 2
	// Default is OUTPUT !!!
	// CC1S = 0 > channel output (CC1 as OUTPUT)

	SET_BIT(TIM8->CCMR2, 	TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC3M_1	| // pwm output compare polarity channel 3 and 4 (pwm mode 1)
							TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC4M_1	);
	SET_BIT(TIM8->CCMR2, 	TIM_CCMR2_OC3PE  | TIM_CCMR2_OC4PE); 	// preload enable ccr 3 + 4


	SET_BIT(TIM8->CCER, TIM_CCER_CC1E  | TIM_CCER_CC2E  | TIM_CCER_CC3E); 	// compare 1 + 2 + 3 output enable
	SET_BIT(TIM8->CCER, TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE); 	// compare 1 + 2 + 3 complementary output enable
	// TODO: CC1P: Capture/compare 1 output polarity ????

	// Load all register via Update event
	SET_BIT(TIM8->EGR , 1); // (UG)



	SET_BIT(TIM8->CR1, TIM_CR1_CEN); //Counter enable
	SET_BIT(TIM8->BDTR, TIM_BDTR_MOE); // Connect signals to outputs (When CCxE and CCxNE are set - see also OSSR and OSSI)
	WRITE_REG(TIM8->SR, 0); 	// Clear any int flags

I think it has something to do with the interrupt. But i dont have set up the interrupt for it yet. But when debugging, it wont go into an error handler. When i activate the pullup, then it works fine, or if i change it to just input mode.

When debugging, it does NOT get stuck somewhere in the code.

[waclawek.jan]

Read out and check/compare-to-working/post content of TIM and relevant GPIO registers.

JW

[Tobe]

I dont know really what would be relevant. Im thinking it has something to do with the execution of a interrupt.

I edited my original post.

[Tobe]

I have now read out register with debug (tab "SFRs"). The only difference is here pull up, or pull down of those channels.

Differences in following registers:

STM32G431xx/GPIOC/PUPDR

STM32G431xx/GPIOC/IDR

STM32G431xx/TIM16/CNT

STM32G431xx/USART3/TDR

None of these give me a hint for the problem. What did i miss?

Differences after tim8 setup. (Gpio init of timer1 is before that). See picture.

[waclawek.jan]

You said, TIM8 stopped working when you set TIM1.

So you want to observe difference of registers content before and after setting TIM1 (i.e. between the working and non-working case).

JW

[Tobe]

Amongst a few other register from timer 8, there is one crucial bit not set:

STM32G431xx/TIM8/CR1/CEN:0x0

But how can that happen, wenn i just change a pull up/down resistor???

And HOW can it affect settings that will be set in the future and also from a different timer?

[Tobe]

I changed the topic and title, since timer1 has nothing to do with it.

Its just when i switch to interrupt input.

[Tobe · Accepted solution]

After carefully debugging i found the cause:

I have an interrupt on another pin with number 2, so the interrupt routine is called, which by chance was deactivating timer 8.

Jeeeez.