ETH_Start() sometimes failed to start mac

[shark]

Posted on December 17, 2013 at 10:26

Hi

My product is based on stm32f407, the Ethernet works well normally, except that, sometimes(10% possibility) after the MCU powered up or hot rebooted, the mac can transmit packets, but can NOT receive. 

When this problem happened, I checked status inside chip, (all the register values listed at bottom):

1. The value in MMCTGFCR indicate tx is good, I can see the packet by wireshark. 2. but MMCRGUFCR is always 0, the RX interrupt does not come too. 3. the magic is here, current value in MACCR is:     40028000      MACCR = 0000800c    I write the SAME 0000800c into 40028000 again manually, the whole MAC works! and always this way.

My ethernet driver is:

 waiting for ethernet negociation finished  ETH_Init()  // according to speed, ...  ETH_Start()  ETH->MMCCR = ETH->MMCCR;  // this patch helps, but not reliable

ETH_Start() failed to start the state machine? I dont konw how to check it or patch it. MMCCR's TE and RE bit is magic, no time requirement?

==============

eos % int -v eth0 eth0       line UP, protocol UP            Link encap Ethernet MTU 1500 Link addr 00:01:02:03:04:72            IP addr 192.168.1.114 netmask 0xffffff00, broadcast 192.168.1.255            sent: ip 4 tot 5 idle 5? qlen 0            recv: ip 0 tot 0 idle 1?37? phy: reg[ 0]=1000 reg[ 1]=782d reg[ 2]=0007 reg[ 3]=c0f1 reg[ 4]=05e1 reg[ 5]=0020 reg[ 6]=0000 reg[ 7]=ffff reg[ 8]=ffff reg[ 9]=ffff reg[10]=ffff reg[11]=ffff reg[12]=ffff reg[13]=ffff reg[14]=ffff reg[15]=0000 reg[16]=0040 reg[17]=0002 reg[18]=00e0 reg[19]=ffff reg[20]=0000 reg[21]=0000 reg[22]=0000 reg[23]=0000 reg[24]=ffff reg[25]=ffff reg[26]=0000 reg[27]=000a reg[28]=0000 reg[29]=00c0 reg[30]=00d0 reg[31]=1044 reg[32]=1000 PHY_status 3: 10M half ===tx desc ===  ♯  address   status     size buf1addr nextdesc 00 2001dea0 00100000 00000000 2001dec0 2001c000 01 2001c000 30100000 0000003c 2001c020 2001c620 02 2001c620 30100000 0000003c 2001c640 2001cc40 03 2001cc40 30100000 0000003c 2001cc60 2001d260 04 2001d260 30100000 0000003c 2001d280 2001d880 05 2001d880 30100000 0000003c 2001d8a0 2001dea0 ===rx desc ===  ♯  address   status     size buf1addr nextdesc 00 2001e4c0 80000000 00004600 2001e4e0 2001eae0 01 2001eae0 80000000 00004600 2001eb00 2001f100 02 2001f100 80000000 00004600 2001f120 2001f720 03 2001f720 80000000 00004600 2001f740 2001e4c0 mac 40028000      MACCR = 0000800c 40028004     MACFFR = 00000040 40028008    MACHTHR = 00000000 4002800c    MACHTLR = 00000000 40028010   MACMIIAR = 00000010 40028014   MACMIIDR = 00001000 40028018     MACFCR = 00000080 4002801c  MACVLANTR = 00000000 40028028  MACRWUFFR = 00000000 4002802c  MACPMTCSR = 00000000 40028038      MACSR = 00000000 4002803c     MACIMR = 00000000 40028040    MACA0HR = 80007204 40028044    MACA0LR = 03020100 40028048    MACA1HR = 0000ffff 4002804c    MACA1LR = ffffffff 40028050    MACA2HR = 0000ffff 40028054    MACA2LR = ffffffff 40028058    MACA3HR = 0000ffff 4002805c    MACA3LR = ffffffff mmc 40028100      MMCCR = 00000000 40028104     MMCRIR = 00000000 40028108     MMCTIR = 00000000 4002810c    MMCRIMR = 00020060 40028110    MMCTIMR = 0020c000 4002814c MMCTGFSCCR = 00000000 40028150 MMCTGFMSCCR = 00000000 40028168   MMCTGFCR = 00000005  // tx is good, I can see it by wireshark too 40028194  MMCRFCECR = 00000000 40028198  MMCRFAECR = 00000000 400281c4  MMCRGUFCR = 00000000

dma

40029000     DMABMR = 02c16080 40029004    DMATPDR = 00000000 40029008    DMARPDR = 00000000 4002900c   DMARDLAR = 2001e4c0 40029010   DMATDLAR = 2001c000 40029014      DMASR = 00660404 40029018     DMAOMR = 06202002 4002901c     DMAIER = 00010040 40029020  DMAMFBOCR = 00000000 40029024   DMARSWTR = 00000000 40029048   DMACHTDR = 2001dea0 4002904c   DMACHRDR = 2001e4c0 40029050  DMACHTBAR = 2001dec0 40029054  DMACHRBAR = 2001e4e0 #mac-driver

[shark]

Posted on December 20, 2013 at 03:27

This problem happens on 10M half duplex ethernet hub.

I tested it again on 100M full ethernet for 100 times, never happens. So, my software driver should be no problem. Hope ST engineers to test driver on 10M ethernet too. I guess, MACCR's start bits must have timing requirement. but what is it? or, even when the bit is 1, writing 1 again will trigger some internal actions again, so where is the status bit to indicate it is realy started.

[francescatodiego]

Posted on December 20, 2013 at 17:15

I wrote my

driver

for

ethernet

STM32F4

I had the same

problem

using this enable sequence

ETH-

>

MACCR

|

=

ETH_MACCR_RE

;

ETH-

>

MACCR

|

=

ETH_MACCR_TE

;

sometimes (

I do not know

why

)

the device

was not working

writing instead

 

ETH-

>

MACCR

|

= (

ETH_MACCR_RE

|

ETH_MACCR_TE

);

always works

...

but

do not ask me

why

[shark]

Posted on December 27, 2013 at 02:13 It works well after modified as you suggested. thank you

[Tesla DeLorean]

Posted on December 27, 2013 at 04:06

Thanks for the update, btw what PHY's are you guys using in these applications?

[francescatodiego]

Posted on December 27, 2013 at 17:55

I work with wvshare STM32F4 devboard (OPEN407I)

The board kit include also an ETH interface with PHY DP83848.