DUAL qspi writing error after 0x93000001 adress

[erdalturkekul]

 Hi,

I'm trying to run dual QSPI Flash with my own design STM32H750XBH6. Flashes are 256 mbit MX25L25645. Single mode 32 mb flash read, write and boot succesfully. However, when I switch to dual chip mode, i get a write error (constant 0XFF) on the 2nd chip after 0x93000001 (48 mb) adresses. (adress 0x90000000 to 0x92FFFFFF  working very well. )

[erdalturkekul]

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@Tesla DeLorean wrote:

Tentative Dual MX25L256 build for your platform (blind port as can't test)

https://github.com/cturvey/stm32extldr/blob/main/h7_mx25l25645g/CLIVEONE-MX25L256_STM32H7XX-PF10-PB6-PF8-PF9-PF7-PF6-PH2-PH3-PG9-PG14.stldr

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Hi, I download it, its not work. Your .stldr file is only 8kb. My .stldr is 2.274 kb. 

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What Part# for the 1Gbit? MX66L1G ?

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like these; MT25QL01, W25Q01 etc.

[erdalturkekul]

@Tesla DeLorean 

I have two last questions left;

1.

During my tests, 2 of my flashes constantly dropped to 0x99 reading.  My guess is that I accidentally enabled write protection. I don't know how to fix this. The chips that stopped reading/writing were both connected to the bk2 data line. I installed both chips that constantly read 0x99 on a card. this is the situation;

2. full chip erase (mass erase) not working in cube programmer.

Thank you very much again for the problem that I have been struggling with for days.

[Tesla DeLorean]

Yes, more indicative that they are not responding to commands.

If you have application side code to run and query the QSPI devices individually or paired, perhaps try the READID / RDID without the reset operations. Stick in SPI / 1-bit modes.

The STLDR don't have to be massive. Plus I removed a lot of the debug and symbolic sections.

[Tesla DeLorean]

The actual code/data foot-print of yours looks to be around 139KB, still quite massive. The side-effect is that space used by the loader can't be used by the programmer to inter-stage your data to write to the flash, so it does more / smaller transactions on the Write() function.

Ok, worked with MT25QL01 and W25Q01, are you using SOICW-16 or BGA-24 type foot-prints?

Currently I don't have a good fixture or board for Dual parts, on the Single's I have a ZIF fixture onto a NUCLEO-144.

Macronix MX66L1G45

https://www.macronix.com/Lists/Datasheet/Attachments/8734/MX66L1G45G,%203V,%201Gb,%20v1.5.pdf

https://www.ebay.com/itm/166113053449

https://www.ebay.com/itm/181631340087

[erdalturkekul]

Hi,

I prefer the wson8 case because wide SOIC8 and WSON8 package are compatible with each other in terms of footprint.

However, if I find flash in other cases at a reasonable price, I can revise the PCB accordingly. 

The chips are actually write protected. I solved the problem by reading a little datasheet and writing a small spi adjustment code.

I will follow your advice on simplifying the code.

Thank you,

[erdalturkekul]

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"2. full chip erase (mass erase) not working in cube programmer."

short solution;

In the datasheet, after the full delete command, it says to keep the cs# pin at level 1 until the full erase process is completed. I also added a delay of about 3 minutes after the mass erase command. This worked, now the full chip erase command works

	sCommand.Address = 0;
	sCommand.DataMode = QSPI_DATA_NONE;
	sCommand.DummyCycles = 0;

	if (HAL_QSPI_Command(&hqspi, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE)
			!= HAL_OK) {
		return HAL_ERROR;
	}
            HAL_Delay(1800000); //wait for erase 
	if (QSPI_AutoPollingMemReady() != HAL_OK) {
				return HAL_ERROR;
			}

	return HAL_OK;
}

[Tesla DeLorean]

I understand the desire for the small packages.

The 300mil foot-print could live outside that for the 8-pin packages at a 90 degree rotation. The part availability is very large, and it accommodates quite large die sizes, or side-by-side die like Micron does with the MT25TL series. Gives purchasing a degree of latitude to source cheapest parts. On a software side would cause stress in identifying and coding for specific devices nuances

The BGA-24 seems to be the manufacturer's choice for the stacked die. One of the larger Infineon / Cypress parts had a 8x8mm package rather than the more common 6x8mm. I was only able to source a ZIF socket for the latter.

The BGA-24 probably a more difficult PCB/PCBA experience 

[erdalturkekul]

The fastest (133 mhz) external hardware of the H7 series is QSPI. This situation also affects some design requirements in PCB design, such as making the nets as short and equal in length as possible. This situation becomes even more important when using dual QSPI. For this reason, a small footprint is advantageous in PCB design as it doesn't take up space and can be placed close to the MCU. However, chips such as SO16 can be used provided that the path lengths are equalized. And MT25QL good chioce for dual qspi