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Driving external shift register chain using USART as "SPI Master" - STM32L051

cjpicklesimer
Associate

I have an application that requires a large number of digital outputs, but they can be very slow.

The "true" SPI ports in my design are already in use for higher-performance peripherals, so my plan is to use a USART in synchronous mode to generate the data and clock outputs from the MCU to the shift register chain. So in my case, this would require the use of USART_TX and USART_CK. Because these are just output shift registers, no data "comes back," so the receiver on this USART isn't needed for anything.

Reading the STM32L051 datasheet and register reference, it seems like the CK and TX functionality can be assigned to suitable pins as alternate functions without having to also assign RX (which I don't need) to a pin. And then beyond that, I could also disable the receiver functionality of the USART itself. This would let me use this USART to latch out data and clock without having to waste an IO pin on the unneeded USART_RX. 

Can anyone confirm that I'm understanding this correctly? This application is somewhat IO-constrained so it would be great to not have to "spend" a pin on the RX just to allow the TX and CK to work.

1 ACCEPTED SOLUTION

Accepted Solutions
Issamos
Lead II

Hello @cjpicklesimer 

I want to confirm that you're right because: 

  • USART_CLK, USART_TX and USART_RX can be assigned separately to pins as alternate function. 
  • You can disable the USART_RX function by setting the 3rd bit of the USART_CR1 to.his reset value(0). And enable both USART_CLK and USART_TX.Screenshot_2023-09-05-00-06-14-55_e2d5b3f32b79de1d45acd1fad96fbb0f.jpg

Best regards.

II

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2 REPLIES 2
Issamos
Lead II

Hello @cjpicklesimer 

I want to confirm that you're right because: 

  • USART_CLK, USART_TX and USART_RX can be assigned separately to pins as alternate function. 
  • You can disable the USART_RX function by setting the 3rd bit of the USART_CR1 to.his reset value(0). And enable both USART_CLK and USART_TX.Screenshot_2023-09-05-00-06-14-55_e2d5b3f32b79de1d45acd1fad96fbb0f.jpg

Best regards.

II

RX not required.

Could also perhaps drive via GPIO. Or remap existing SPI peripheral to an alternate pair of pins if you can control/sequence ownership

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