2020-10-19 11:00 PM
I'm trying to generate a cascade of DMAs:
1) HRTIM trigger ADC.
2) On ADC conversion completion, DMA ADC results to memory.
3) On ADC DMA transfer complete, DMA memory to different peripheral.
When a DMA occurs, the DMA request multiplexer generates both a request to the DMA controller and an event that can be used as a trigger input in the DMA Request Generator.
RM0440 Rev4, Table 92 on page 427: Trigger input 16 to 20: DMAMUX1_ch[0,1,2,3]_event.
Since there are only four events - this means my ADC DMA has to be one of these four DMA channels?
An item that I found very confusing is that RM0440 Rev 4, Section 13.6.1 page 435 has an EGE bit for all sixteen DMAMUX outputs but in reality only four - channels 0 to 3 are connected between the multiplexer and the request generator. I would split this section into two - one would be for channels 0 to 3 where the EGE bit is shown and then another for channels 4 to 15 where the EGE bit is reserved or whatever ST's convention is.
I spent a couple of hours trying to figure out why all sixteen registers have EGE bit and how those are mapped to the request generator.
2020-10-26 10:49 PM
@Imen GH Any chance you can help with this, too?
In Section 13.4.1, page 429, Figure 32, it shows dmamux_evtx as going from 0 to m which is the same as dmamux_req_outx.
Section 13.6.1, page 435, all sixteen of DMAMUX_CxCR have EGE. This matches the above Figure.
But there are only four DMAMUX request generator channels (Section 13.3.1, page 425, Table 90). This matches four DMAMUX_RGxCR in Section 13.6.4, page 437.
How do the sixteen dmamux_evtx in DMAMUX_CxCR map to four DMAMUX_RGxCR?
2020-11-02 02:15 AM
Hello,
There are 4 request generator channels and 16 output request channels.
Please refer to the attached figure.
Regards
2020-11-02 04:24 AM
It's not crystal clear, but while all 16 DMAMUX_CxCR have EGE, only outputs of four of them are really used, the rest is simply ignored.
Even those four events don't map to the four request generators directly, but through DMAMUX_RGxCR.SIG_ID, see DMAMUX: assignment of trigger inputs to resources table. The "four" in "four events" and "four request generators" is just a coincidence.
ST should consider producing an appnote (or set of appnotes) describing concisely and unambiguously the DMAMUX features. But then, all ST peripherals deserve such treatment.
JW
2020-11-02 12:21 PM
So, how do the channels m = 16 map to the request generators n = 4?
In the reference manual (tables called out in my notes above), they show four individual events in the trigger for the request generator implying that only channels 0 to 3 are connected to the request generator.
It could be that the events in the trigger is a four bit bit field. In that case, any of the channels m = 16 can map to any event generator.