DMAMUX configuration

[fullcustomasic]

Hello community,

I cant get the dma working on the stm32g474. What I did till now:

- enabled tim15 -> working with interrupts

- enabled dma req. on update event

- enabled dma and dmamux clocks in rcc

- enabled dma int in nvic -> can be triggered through nvic

- configured dma channel 1(with transfer complete interrupt)

- configured dmamux

 -> first in unconditional mode -> only programmed sigid register with tim15_ch1 and also tried tim15_trig, but both are not working

 -> then I tried sync mode, with tim15_ch1 as input, with event generation and dmamuxch0 as trigger input for dmamux generator, not working

- enabled dma channel 1

I red something about wait cycles from a similar question after enabling rcc peripheral clocks, so I did that aswell..

Did I miss or forget something?

[STTwo-32]

Hello @fullcustomasic and welcome to the ST Community 😊.

I suggest you refer to DMA configuration examples of the STM32CubeG4.

Best Regards.

STTwo-32 

[fullcustomasic]

Hi, I am not using any HAL, only bare metal. So its rather a pain to verify every conditional statement in the HAL code. I hope someone can help me, maybe I have to upload code for clarification..

br

[fullcustomasic]

This is a code snippet with the relevant section

@nvic init
	@enable nvic
	ldr r1, =#0xe000e100

	@tim15 int set
	ldr r2, =#0x1000000
	@dma1_ch1_int set
	ldr r3, =#0x800
	orr r2, r3
	str r2, [r1]
@dma init

	ldr r0, =RCC
	ldr r1, [r0]
	orr r1, RCC_AHB1ENR_DMA1EN
	orr r1, RCC_AHB1ENR_DMAMUX1EN
	str r1, [r0]

	ldr r0, =DMA1
@dmac1 - config
	@cpar - GPIOA
	ldr r1, =#0x48000000
	str r1, [r0, 0x10]
	@cmar - CCM SRAM
	ldr r1, =#0x20018000
	str r1, [r0, 0x14]
	@counter - cndtr1
	mov r2, #10
	str r2, [r0, 0xc]

	@ccr1
	@dir -> read from peripheral
	mov r1, #0x10

	@tcie, transfer completed int en
	orr r1, #0x2
	@transfer error int en
	orr r1, #0x8
	@minc
	orr r1, #0x80
	str r1, [r0, 0x8]

	@dmamux config
	ldr r1, =DMAMUX
	@mov r2, #77
	mov r2, #78
	str r2, [r1]

	dsb 

	@enable dma ch1
	ldr r1, [r0, 0x8]
	orr r1, #0x1
	str r1, [r0, 0x8]

@timer init
	ldr r0, =RCC_APB2ENR
	ldr r2, [r0]
	ldr r3, =RCC_APB2ENR_TIM15EN
	orr r4, r1, r3
	orr r2, r4
	str r2, [r0]
@tim15

	ldr r0, =TIM15

	@master trigger out on udpate event
	mov r1, #0x20
	@str r1, [r0, 0x4]

	@arr
	ldr r2, =#0xff
	str r2, [r0, 0x2c]

	@dier
	@dma req. on update
	mov r2, #0x100
	@update int en
	orr r2, #0x1
	str r2, [r0, 0xc]

	@cnt enable
	mov r1, #0x1
	str r1, [r0]

ccnt:
	b ccnt

If someone has an working example for gx series with dmamux without HAL Im happy if you could show me a code snippet!

[waclawek.jan · Accepted solution]

I don't think asm has here much fans.

Generally, debugging is always about reading out and checking register content. The mcu does not work out of sources, it works out of the actual registers content.

ldr r0, =RCC
	ldr r1, [r0]
	orr r1, RCC_AHB1ENR_DMA1EN
	orr r1, RCC_AHB1ENR_DMAMUX1EN
	str r1, [r0]

I don't think this is correct, you'd need to ofset RCC for RCC_AHB1ENR.

JW

[fullcustomasic]

Thank you! I forgot to set the offset. br