Hello!
I am using the STM32F446RE Nucleo Board and succeeded in sending a signal chain via DMA to the GPIO Bank B, i.e. the BSRR register.
The DMA trigger works very fine. However, one of the 8 signals is missing/not generated/skipped...
This is where I need help. I cannot figure out, why there is only one signal missing, "rw_pulse2", while all the others are generated correctly. (attached, a screenshot of the LA capture).
This are the macros defined by the CubeIDE:
#define row_sel1_GPIO_Port GPIOB
#define row_sel2_Pin GPIO_PIN_2
#define row_sel2_GPIO_Port GPIOB
#define row_sel3_Pin GPIO_PIN_4
#define row_sel3_GPIO_Port GPIOB
#define row_sel4_Pin GPIO_PIN_5
#define row_sel4_GPIO_Port GPIOB
#define rw_pulse4_Pin GPIO_PIN_6
#define rw_pulse4_GPIO_Port GPIOB
#define rw_pulse3_Pin GPIO_PIN_7
#define rw_pulse3_GPIO_Port GPIOB
#define rw_pulse1_Pin GPIO_PIN_8
#define rw_pulse1_GPIO_Port GPIOB
#define rw_pulse2_Pin GPIO_PIN_9
#define rw_pulse2_GPIO_Port GPIOB
The ones I further defined:
#define SET_ROW_SEL1 (row_sel1_Pin)
#define SET_ROW_SEL2 (row_sel2_Pin)
#define SET_ROW_SEL3 (row_sel3_Pin)
#define SET_ROW_SEL4 (row_sel4_Pin)
#define SET_RW_PULSE1 (rw_pulse1_Pin)
#define SET_RW_PULSE2 (rw_pulse2_Pin)
#define SET_RW_PULSE3 (rw_pulse3_Pin)
#define SET_RW_PULSE4 (rw_pulse4_Pin)
#define RESET_ROW_SEL1 ((uint32_t)row_sel1_Pin << 16U)
#define RESET_ROW_SEL2 ((uint32_t)row_sel2_Pin << 16U)
#define RESET_ROW_SEL3 ((uint32_t)row_sel3_Pin << 16U)
#define RESET_ROW_SEL4 ((uint32_t)row_sel4_Pin << 16U)
#define RESET_RW_PULSE1 ((uint32_t)rw_pulse1_Pin << 16U)
#define RESET_RW_PULSE2 ((uint32_t)rw_pulse2_Pin << 16U)
#define RESET_RW_PULSE3 ((uint32_t)rw_pulse3_Pin << 16U)
#define RESET_RW_PULSE4 ((uint32_t)rw_pulse4_Pin << 16U)
And the function that is responsible for the pattern generation and the DMA transfer:
void write_memristor(uint32_t cycles) {
static uint32_t row_pattern[8];
row_pattern[0] = SET_ROW_SEL1 | SET_RW_PULSE1 | RESET_ROW_SEL4 | RESET_ROW_SEL2;
row_pattern[1] = RESET_ROW_SEL1 | SET_ROW_SEL2 | SET_RW_PULSE2 | RESET_RW_PULSE3;
row_pattern[2] = RESET_ROW_SEL2 | SET_ROW_SEL3 | SET_RW_PULSE3 | RESET_RW_PULSE4;
row_pattern[3] = RESET_ROW_SEL3 | SET_ROW_SEL4 | RESET_RW_PULSE1 | SET_RW_PULSE4;
row_pattern[4] = SET_ROW_SEL1 | RESET_ROW_SEL4 | RESET_ROW_SEL2 | SET_RW_PULSE1;
row_pattern[5] = RESET_ROW_SEL1 | SET_ROW_SEL2 | RESET_RW_PULSE3 | SET_RW_PULSE2;
row_pattern[6] = RESET_ROW_SEL2 | SET_ROW_SEL3 | SET_RW_PULSE3 | RESET_RW_PULSE4;
row_pattern[7] = RESET_ROW_SEL3 | SET_ROW_SEL4 | RESET_RW_PULSE1 | SET_RW_PULSE4;
// Start the DMA transfer
HAL_DMA_Start_IT(&hdma_tim1_up, (uint32_t)row_pattern, (uint32_t)&(GPIOB->BSRR),8);
HAL_TIM_Base_Start_IT(&htim1); // Start the timer with interrupt
HAL_TIM_PWM_Start_IT(&htim1, TIM_CHANNEL_1);
HAL_TIM_PWM_Start_IT(&htim2, TIM_CHANNEL_1);
TIM1->DIER |= TIM_DIER_UDE; // Set UDE bit (update DMA request enable)
}
Thanks a lot!
Cheers,
Ruan!
