Posted on June 14, 2018 at 10:19Below some voltage, a Backup Domain Reset occurs. So I use RCC_BDCR.LSEON bit for this purpose; any bit which is reset by Backup Domain Reset will do. You should also see the clock to be stopped and reset. ST likes to use a mägic number in one of RTC_BKPxR, these are guaranteed to be reset to 0x00000000 upon Backup Domain Reset.
However, there may be a gray area where the voltage is too low so LSE stops but it won't reset yet. This of course depends on the particularities of the LSE circuit (crystal, caps, parasitics - layout, EMI - surrounding circuitry, even mechanical vibrations as that influences the crystal), so it's hard to impossible to characterize completely. You may want to work towards eliminating this area by improving the LSE circuit.
Any attempt for a 'safer' method than this entirely implemented in the mcu (e.g. waking up periodically and measuring the remaining voltage on the supercap) costs considerable amounts of energy thus shortens the backup span.
Other method at the expense of external circuitry may be to use a low-leakage capacitor charged from the supercap's voltage through and isolation switch (mosfet), in parallel with a resistor representing the RTC consumption. The isolation would be switched from a mcu pin, so when primary power fails, the capacitor is isolated from the supercap, and starts to discharge. A comparator then could be used to determine whether there's been enough power left in the capacitor (thus also in the supercap) at the moment when primary power is restored.
JW
