Cubemax ADC Clock Issue for NUCLEO-H743ZI

[PeterWangPTD]

Hi,

    The default ADC clock source is PLL2P = 80 Mhz in my Cubemax "Clock Configuration" TAB.

     I can use ADC clock Prescaller to lower it below 50 Mhz. 50Mhz is the max vale for ADC clock.

     Question: The default setting PLL2P = 80Mhz before applying the ADC Prescaller is allowed or disallowed?

                       If it is disallowed, how to lower PLL2P in Cubemax "Clock Configuration" TAB. without changing all other clock's default settings?

      Thanks

Rong

[mƎALLEm · Accepted solution]

Hello,

The important thing that needs to be checked regarding this point is the Table 60. "Kernel clock distribution overview" in the reference manual: the maximum ADC kernel clock versus the voltage scale and the system frequency:

If you've been allowed to set 80MHz for the ADC kernel clock which is the maximum value then you are allowed to set less frequency: for example 50MHz.

Hope I understood your question and answerd it.

[RongShengWang]

AI's answer was wrong - telling me 50 MHz is the max value for ADC kernel.  

In my  in my CubeMax "Clock Configuration" TAB for NUCLEO-H743ZI, the default ADC clock source is PLL2P = 80 Mhz. It should be fine.

Thanks!!!