Confirmation on EXTI limitiation

sarun · ‎2024-11-28

I want to confirm the limitations of GPIO interrupts on STM32 devices.

I am using an STM32H7 device, and observed that interrupts cannot be configured for PA0 and PB0 at the same time. I could not find any confirmation regarding this in the device datasheet,can anyone give me the confirmation on this.

SofLit · ‎2024-11-29

Hello @sarun ,

If you refer to the reference manual / SYSCFG_EXTICR[n] register, you find that only one IO on x position could be configured as EXTI input at a time:

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STTwo-32 · ‎2024-11-28

Hello @sarun

PA0 and PB0 and so on, are connected to Line0, so you can use only one pin at one time to handle interrupt from there.

Best Regards.

STTwo-32

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SofLit · ‎2024-11-29

Hello @sarun ,

If you refer to the reference manual / SYSCFG_EXTICR[n] register, you find that only one IO on x position could be configured as EXTI input at a time:

To give better visibility on the answered topics, please click on "Accept as Solution" on the reply which solved your issue or answered your question.
PS: This is NOT an online support (https://ols.st.com) but a collaborative space. So please be polite in your reply. Otherwise, it will be reported as inappropriate and you will be permanently blacklisted from my help/support.

sarun · ‎2024-11-29

Thank you for the support @SofLit @STTwo-32