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Cannot get CC1 on TIM15 to go low using CCMR1 register

SWenn.1
Senior III

Using a Nucleo-F072RB.  I am trying to get the output of CC1 to go low after the CPU does something.  Everything is working as expected except I cannot get the line to go low.  I have tried both variants of the CC1P bit and neither seems to work.  I place a breakpoint at the first line where I touch CCMR1 register and single step.  I see that the bits are as I believe they should be but for the life of me I cannot force the output line low (line 3 below --- monitoring with scope).  Can someone tell me what I am missing?

 

	__HAL_TIM_DISABLE_IT(&htim15, TIM_DIER_CC1IE);
	htim15.Instance->CCMR1 = TIM_OCMODE_TIMING;
	htim15.Instance->CCMR1 = TIM_OCMODE_FORCED_INACTIVE;
	htim15.Instance->CCMR1 = TIM_OCMODE_TIMING;
	htim15.Instance->CCMR1 = TIM_OCMODE_ACTIVE;

 

 Thanks 

19 REPLIES 19
AScha.3
Chief II

Did you try ...

HAL_TIM_OC_Stop(xx);

>

* @brief Stops the TIM Output Compare signal generation.

* @PAram htim TIM handle

* @PAram Channel TIM Channel to be disabled

<

If you feel a post has answered your question, please click "Accept as Solution".

Read out and check/post content of TIM and relevant GPIO registers.

JW

SWenn1_0-1711327223155.png

timer registers at said breakpoint in original post and GPIO (PB14 is signal I am monitoring)....this is after a reset and the 1st time hitting the breakpoint

 

SWenn1_1-1711327337765.png

 

This does nothing to change the OC output value.

What you set for the xx channel out (in Cube ?) ?

like this:

AScha3_0-1711372316381.png

 

If you feel a post has answered your question, please click "Accept as Solution".

I was hoping you were going to decipher the registers, thus find out what's wrong, yourself.

GPIOB_MODER=0x10000000

that means, the field for PB14 is set to 0b01, i.e. GPIO Output, not AF (which would be 0b10).

And AFR for PB14 is set to 0, for TIM15_CH1 it would need to be set to 1 (see Alternate functions table in DS).

In other words, you don't have PB14 set as TIM15_CH1 at all.

But even if you would have PB14 set as AF/TIM15_CH1, as both TIM15_CCER.CC1E = 0 and TIM15_BDTR.MOE = 0, that output would be disabled anyway.

JW

I would not have posted if I hadn't already looked at those registers (and as you seem to indicate your suggestion would not alter the outcome) ....To me they all looked fine plus the scope is showing me that the I/O is performing to the "toggle on match" as expected.  I used CubeMX to initialize things and intentionally I specifically set Channel 1 as "Output Compare No Output" and am using the I/O just as a test to validate something.  I am just trying to get the I/O low after it toggles ....

The manual clearly states:

SWenn1_0-1711374148291.png

I have tried CCxP both high and low in conjunction with using "FORCE INACTIVE" and "FORCE ACTIVE" but none of the combinations seem to work.

> To me they all looked fine plus the scope is showing me that the I/O is performing to the "toggle on match" as expected.

Not with these settings.

You have PB14 set as GPIO Out, and set to 1 in GPIOB_ODR.

JW

If I change GPIO->MODER to AF my signal (yellow scope trace) completely disappears.  That is not what I want.  I am bound to pin PB14 so I cannot change CCR1 in CubeMX to "Output Compare Ch1" which then forces me to use GPIO and generate an Interrupt on match. Here is a scope picture (both micro and macro) showing the issue:

It literally is just a matter of changing the toggle on the I/O to fall low at the end of each toggle.  I have attached macro and micro pics showing scope on rising and falling edge of a 4 second sample rate (pink trace).