Can STM32 chips use any pin?

ulao · ‎2022-12-02

Coming from AVR this is not possible, I do see some peripherals can use multiple pins. Working with the STM32H7 specifically here. A colleague of mine said he was under the impression ST chips can use any pin ( or a number of pins ) for say one of the SPIs. From what I see it depends on shared resources like SPI5 and UART7 share pins, so they have alternate pins but surly you can not just use any pin?

Peter BENSCH · ‎2022-12-02

You can only use the alternate pins for which alternate functions exist. In STM32CubeMX you can see which functions are possible for each pin by clicking on it.

With a longer (approx. 2s) Ctrl-click on an assigned pin, the alternate pins flash with the same function.

Regards

/Peter

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MM..1 · ‎2022-12-02

For HW peripherals cant use any, for software emulation you can, but this is true for any mcu

Tesla DeLorean · ‎2022-12-02

The pin usage / availability is fully described in the Data Sheet for the part, you and your colleague should review this prior to design work commencing.

There are tables describing the options for each GPIO pin in a Pick-One-of-Many selection via a MUX selection in the GPIO's registers

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S.Ma · ‎2022-12-02

It is half way between full crossbar mux and fixed pinout. Open the datasheet, browse the pinout table to check which peripheral signal is supported on which pin, and check the pin property (5v tolerant, etc...). When the number of peripher gets higher than pins availablr, a minimum pin muxing becomes naturally needed, especially in low pincount ones.

Piranha · ‎2022-12-04

Finding the MCU, selecting the pin configuration and checking the possible clock configurations are those features, which are actually useful in CubeMX.

S.Ma · ‎2022-12-04

Wouldn't it be a time saver that cubemx implement constrain solver type algorythm to short list options when asking, say, find me the smallest STM32 package with 2 usart, 3 spi, one octopsi, one sdio interface, among the ultra low power family? Which implies, given the baudrates, the lowest possible core clock meeting the demand? Isn't fast compute the strong point of a computer?