Can PA0 be used as TIM2 channel 1. The datasheet in function mapping uses TIM2_CH1_ETR. Note PA5 also has TIM2_CH1_ETR. PA15 has TIM2_CH1/TIM2_CH1 implying there is a difference. Pin definition has all listed as TIM2_CH1_ETR.

[Sarra.S]

Hello @RobG​, thank you for posting,

Yes, all pins PA0, PA5, and PA15 can be used as TIM2_CH1 as it's the 1st alternate function AF1, it's up to you to choose which pin to use without having any conflicts with other functions.

Hope that helps!

[RobG]

Why are all the other timer TIMx_CH1 or TIMx_ETR? Is the TIM2_CH1_ETR an either or depending on how the timer is configured. Why is ETR added what does it mean can it be disabled.

[Sarra.S]

Hello again @RobG​,

Sorry, I didn't get your first question!

ETR means External Trigger input which is a timer feature, you should read the dedicated paragraph in your product reference manual.

[RobG]

Could you please point me to the specific paragraph. They documentation specifically states changing from TIM2_CH1/TIM2_ETR to TIM2_CH1_ETR for PA0 and PA5, but left PA15's TIM2_CH1/TIM2_ETR alone. I can find nothing telling me how PA0 and PA5 differ from PA15, but the documentation implies a difference. The labelling also differs from every other timer for CHx and ETR. What is that difference?

I want to use TIM2 as an encoder. I have used 4, 5, and 8 in the past by connecting to TIMx_CH1 and TIMx_CH2. The only pin where TIM2_CH1 is listed for alternate function mapping is PA15 and I need that for JTDI (no other location).

[Sarra.S]

could you specify which STM32 are you using?

[RobG]

STM32F405/7 we are migrating from the 5 to the 7 and moving timers around.

Sorry, I should have mentioned this in the first post.

[RobG]

For some reason the picture you [Sara] posted is not showing up, but I can access it from email.

I am not sure what you are trying to tell me. That picture (if I understand) says a timer can have 5 pins: _CH1, _CH2, _CH3, _CH4, _ETR. The _CHx can be either input or output. Nothing is listed as _CHx_ETR as mentioned in the documentation.

[waclawek.jan]

It means just this: the CH1-input and ETR pads of the internal TIM module are simply hard-wired together (and then connected to output of the input AF MUX in GPIO).

 

In other words, you are not supposed to use both CH1 and ETR at the same time in TIM2; if you do, everything works as expected, but the results may be confusing, as signals simply come in both ways.

Or, in even other words, if you don't enable any ETR functionality (i.e. external clock from ETR or the output clear from ETR, see ETR subchapter of TIM chapter), you can use those pins simply as TIM2_CH1.

Yes, the pin marking is confusing. And, ST can't decide, whether to mark it TIM2_CH1/TIM2_ETR or TIM2_CH1_ETR - both mean the same. Both are confusing and ST switched back and forth (in various versions of this DS and DS of other STM32 which have similarly merged functions on pins) so long that both of them are present in the current DS, increasing confusion. Yes, ST are not famous for being meticulous. And they are also not famous for their ability to explain things in simple terms, as they for some inexplicable reason (or is it a valid reason? are the mcu programmers scared of hardware/electronics?) prefer confusing shorthands and muddy expressions to conventional engineering block diagrams and schematics.

They also prefer modern-feel-and-look to black and white in the documentation. It's a cultural thing.

JW

[RobG]

Thanks Jan!

That is what I figured, but before I go spend $1000s on a prototype thought I should be sure.

I prefer the TIM2_CH1/TIM2_ETR. They are mutually exclusive for the timer since they are both inputs, and I saw a note to that affect somewhere in the datasheet or reference manual. It would align with the other timers doing it that way. The real confusion was that PA15 was not updated which made me wonder what I was missing. Thanks again!