Burst read error in HyperFlash on the STM32H723

[blanc6389]

Hi

Community,

I am working with an STM32H723 microcontroller and have configured the OctoSPI interface as follows:​

• OctoSPI clock source: 200 MHz​
• Clock Prescaler of OctoSPI2: 2​
• OctoSPI2 operating frequency: 100 MHz​

In my setup, HyperRAM and HyperFlash share the same data lines in multiplexed mode. HyperRAM is connected to OctoSPI1, and HyperFlash is connected to OctoSPI2.

OctoSPI2 Initialization Code

  OSPIM_CfgTypeDef sOspiManagerCfg = {0};
  OSPI_HyperbusCfgTypeDef sHyperBusCfg = {0};
  
  hospi2.Instance = OCTOSPI2;
  hospi2.Init.FifoThreshold = 1;
  hospi2.Init.DualQuad = HAL_OSPI_DUALQUAD_DISABLE;
  hospi2.Init.MemoryType = HAL_OSPI_MEMTYPE_HYPERBUS;
  hospi2.Init.DeviceSize = 24;
  hospi2.Init.ChipSelectHighTime = 2;
  hospi2.Init.FreeRunningClock = HAL_OSPI_FREERUNCLK_DISABLE;
  hospi2.Init.ClockMode = HAL_OSPI_CLOCK_MODE_0;
  hospi2.Init.WrapSize = HAL_OSPI_WRAP_NOT_SUPPORTED;
  hospi2.Init.ClockPrescaler = 2;
  hospi2.Init.SampleShifting = HAL_OSPI_SAMPLE_SHIFTING_NONE;
  hospi2.Init.DelayHoldQuarterCycle = HAL_OSPI_DHQC_ENABLE;
  hospi2.Init.ChipSelectBoundary = 0;
  hospi2.Init.DelayBlockBypass = HAL_OSPI_DELAY_BLOCK_USED;
  hospi2.Init.MaxTran = 128;
  hospi2.Init.Refresh = 0;
  if (HAL_OSPI_Init(&hospi2) != HAL_OK)
  {
    Error_Handler();
  }
  sOspiManagerCfg.ClkPort = 1;
  sOspiManagerCfg.DQSPort = 1;
  sOspiManagerCfg.NCSPort = 2;
  sOspiManagerCfg.IOLowPort = HAL_OSPIM_IOPORT_1_LOW;
  sOspiManagerCfg.IOHighPort = HAL_OSPIM_IOPORT_1_HIGH;
  sOspiManagerCfg.Req2AckTime = 1;
  if (HAL_OSPIM_Config(&hospi2, &sOspiManagerCfg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
  {
    Error_Handler();
  }
  sHyperBusCfg.RWRecoveryTime = 0;
  sHyperBusCfg.AccessTime = 10;
  sHyperBusCfg.WriteZeroLatency = HAL_OSPI_NO_LATENCY_ON_WRITE;
  sHyperBusCfg.LatencyMode = HAL_OSPI_FIXED_LATENCY;
  if (HAL_OSPI_HyperbusCfg(&hospi2, &sHyperBusCfg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
  {
    Error_Handler();
  }

HyperFlash Read Function:

uint16_t FlashRead(uint32_t word_address, uint8_t *buffer, size_t buffer_size)
{
  OSPI_HandleTypeDef *hOSPI = &hospi2;
  HAL_StatusTypeDef halErr = HAL_OK;
  OSPI_HyperbusCmdTypeDef sCommand = {0};

  uint32_t address = word_address << 1; // convert to bytes address

  /* Initialize the read command */
  sCommand.AddressSpace = HAL_OSPI_MEMORY_ADDRESS_SPACE;
  sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS;
  sCommand.Address = address;
  sCommand.DQSMode = HAL_OSPI_DQS_ENABLE;
  sCommand.NbData = buffer_size;

  /* Configure the command */
  halErr = HAL_OSPI_HyperbusCmd(hOSPI, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE);
  if (halErr != HAL_OK)
  {
      Error_Handler();
  }

  /* Reception of the data */
  halErr = HAL_OSPI_Receive(hOSPI, buffer, HAL_OSPI_TIMEOUT_DEFAULT_VALUE);
  if (halErr != HAL_OK)
  {
      Error_Handler();
  }

  return halErr;
}

I am encountering a verification issue after downloading XIP firmware into HyperFlash.

Specifically, data matches up to address 0x964b0. Beyond this address, discrepancies occur.

For instance, the expected bytes are [FE, 5F, E0, 01, 27, 5D, E0] from address 0x964b0. Reading 2 bytes at a time yields correct data. However, an 8-byte burst read results in [FE, 5F, E0, 03, 27, 5D, E0], indicating a 1-bit error.

Modifying the XIP firmware sometimes resolves or shifts the error to another address. Notably, if an error occurs in a specific XIP firmware version, it consistently fails at the same address. The error address within the same firmware is not random. Read test wan't done in memory map mode. 

I have utilized DelayBlock_Configure() with various combinations of PhaseSel and units but have not identified a stable value.​

I am seeking suggestions to resolve this bit-flipping error. Has anyone experienced similar issues or can provide insights into potential causes and solutions?

[KDJEM.1]

Hello @blanc6389,

Which HyperRam and HyperFlash memories are you using? Could you please share the memories datasheets?

I recommend you to check the delay block configuration and the calibration.   

For that, I advise you to refer to this example DLYB_OSPI_PSRAM_ExhaustiveTuning and this FAQ How to calibrate the delay block with the OCTOSPI interface and check the delay block calibration.

I hope this help you.

Thank you.

Kaouthar 

[blanc6389]

I use the following flash and ram.

HyperRam:  Infineon S70KS1282
HyperFlash: Infineon S26KS128

U5 and H7 have different DLYB functions in the LL driver. However, I tried using DelayBlock_Configure() on H7 to set PhaseSel and units as done in DLYB_OSPI_PSRAM_ExhaustiveTuning. None of the combinations worked—it usually fails on the second attempt of the read test at the same address, where the read data does not match.

Additionally, I use DelayBlock_Enable() after initializing OctoSPI, with the OctoSPI clock set to freerunning. However, it always returns a timeout error.

[KDJEM.1]

Hello @blanc6389,

Is the cache enabled? 

I recommend disabling the cache to avoid masking issues.

I advise you to look at this discussions may help you: Help needed for tuning 64Mb HYPERRAM (S27KL0642DPBHI020) on STM32H735IGT6.

Please make sure that you configure the memory and the octo-SPI controller to have at least six clock cycles of latency. Because, when the DQS signal is used for HyperBus™ memories, and the number of latency clock cycles programmed in TACC[7:0] is lower than six, a deadlock occurs during read operations. I recommend you to check the STM32H723 errata sheet and precisely section 2.8 OCTOSPI.

Thank you.

Kaouthar