Posted on October 30, 2014 at 10:35Not sure if this is a bug or just a missing feature, but I'll explain what I'm doing!
I am using STM32CubeMX version 4.3.0 to configure clocks on an STM32F407IEHx.
When setting values in the clock configuration, clocks that are above their maximum are highlighted in red.
I have a SYSCLK of 168MHz, and APB2 clock of 84MHz. All OK.
In the ADC configuration I have set the ADC clock to 'PCLK2 divided by 2'.
This results in the ADC clock being 42MHz, however it has a maximum of 36MHz.
There is no warning that the maximum clock has been exceeded.
The ADC clock is not shown on the 'clock configuration' tab, but on the 'configuration' tab when setting the divider I would have thought divide by 2 would have been shown in red.
Should there be a warning for this clock being exceeded?
