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Board-To-Board abstraction protocol (MUX, eRPC..)

Davide Dalfra
Associate III

Hi Folks

I'm running a design where i have a sort "Expansions" board where all the Analog inputs and RS485 / UARTS port are located.

This board is running a STM32F107 mcu.

Then i have another board running a STM32F429NIH6 MCU, where we handle LCDs, ETH, External Flash & RAM.

The two boards are connected over a SPI-BUS.

The brain of the system is located on the STM32F429, and we can think the F107 is just a "smart" I/O Expansion. I was looking at a sort of abstraction layer which can "simplify" the dialog between the two boards in the more versatile way.

I have some idea in mind, but i'm not sure i'm on the right way:

Before doing all the exchange protocol myself, i would prefer some stable architecture/system.

  1. MUX (used in automotive industries). So far i did not find a good implementation online
  2. eRPC (https://github.com/EmbeddedRPC/erpc)

Any suggestion from your side?

3 REPLIES 3
Uwe Bonnes
Principal III

If the F107 (why such an old part? ) is just a smart IO Expansion, i would connect via serial, I2C, CAN or SPI according to my speed needs.

Davide Dalfra
Associate III

We have stock of that MCU, in this period is like having god sit in front of us.

However connecting it over SPI , CAN, I2C it's quite ok.

My question was more on which protocol can be used over that bus. ISO-TP ported over SPI could be also an idea.

Uwe Bonnes
Principal III

Having stock is always a good thing, especially in these times. Sorry, I did not see "SPI". Filling up all pins of a 216 pin device seems like some bigger effort. Before starting with the F107, reconsider if not some of the pins used on the F7 could be handled by a port extender (slow GPIO, PWM) ,and so get pins free for other task. Having the need for software on both ends (F7 and F1) gives a lot of headaches I would like to not have. If using SPI, connect Chip Select so that commands get an easy visible frame and are independant from each other. I used somethinmg like that to controll an FPGA with many registers from an AVR8.