I use the Segger tool chain, which is quite reliable.
>>Then I reset all registers of the ADC and DMA to the values they had at the first cycle at exactly this location.
>What exactly do you do? Doesn't this start an ADC conversion?
I set the register values via the register editor in the debugger back to thier earlier values.
So in the second cylce just before the ADC_CR2_DMA bit is set I have the following system state:
- ADC enabled waiting for SW-trigger or DMA request
- ADC_CR2_DMA = 1 ; still set from first ADC sequence cycle (wrong, in my optinition, HAL should disable it when all transactions finished)
- DMA is still enabled (wrong in my optinion; HAL should disable it when all transactions finished)
- DMA_CNDTR0 = 0
Since DMA_CNDTR0 = 0 i assume that there is no DMA request pending. (if it were the ADC would keep konverting).
If I now set the ADC_CR2_DMA bit again the ADC conversion starts.
I just found the follwing note:
ADC_CR2:
Bit 0 ADON: A/D converter ON / OFF ..
1: Enable ADC and to start conversion
Note: If any other bit in this register apart from ADON is changed at the same time, then
conversion is not triggered. This is to prevent triggering an erroneous conversion.
Since the ADC_CR2.ADON bit is in the same register as the DMA bit this rule applies for setting the DMA bit. If the DMA bit was 1 before and is rewritten with 1 again, this might be counted as "DMA bit did not change" which might cause the (also set (correct)) ADON bit to trigger the ADC conversion.
