ADC Conversion time doesn't change when changing the sampling time

[Shaheen]

Hello,

at the moment i try to verify the conversion time of the ADC that is described in the datasheet.

I measure one channel in regular conversion mode without interrupt. 

To calculate the conversion time i used the equation in the datasheet.

Tconversion = tsampletime + ConversionTime

The resolution is fixed with 14bit -> 17 ADC cycles.

ADC clk = 3682540Hz.

I toggle a pin after starting the ADC and i toggle the pin again when EOS flag bit is set: 

GPIOA_NS->BSRR |= GPIO_BSRR_BS0;

while((ADC1->ISR & ADC_ISR_EOC) != (ADC_ISR_EOC))
{
}

GPIOA_NS->BSRR |= GPIO_BSRR_BR0;

I measured the Conversion time with the ocilloscope.

Here are the results ( at the left hand side the measured conversion time and at the right side the calculated):

There is a delay of 6us because of the pin toggling that i have also taken into account for the measurement results!.

TSmpl [cycles]	Tsar [cycles]	Tconv + PIN Toggle measurement [us]	Tconv + PIN Toggle Theory [us]
5	17	11.9	11.9
6	17	11.9	12.2
12	17	11.9	13.8
20	17	16.3	16
36	17	20.6	20.4
68	17	29.3	29.1
391	17	116	116.8
814	17	233	231.6

My question is: Why stays the conversion time the same for the first 3 sampling time configurations?

[Christian N]

This post has been escalated to the ST Online Support Team for additional assistance. We'll contact you directly.

[AScha.3]

Hi,

just (you verified most timings perfectly) , did you verify whats in SMPx[2:0]: (Channel x sampling time selection) really is ?

[Shaheen]

Hi,

i already checked the respective SMP register. Here i set the sample time to 12 ADC Cycles.

The register is set like expected.

Below are the ADC1 registers after ADC conversion start and after end of conversion (EOC).