2 QSPI RAM on STM32H7B0 with APS6404L-3SQN-SN

[OGhis]

Dear,

We would on the STM32H7B0RBTx connecting 2 external QSPI RAM of APS6404L-3SQN-SN.
Therefore we will use the 2 QSPI RAM chips in Multiplex mode, but we have only 1 NCS pin that we can configure.
When we look in the application note AN5050 on page 27 we see that it is possible but with STM32Cube it isn't possible to configure the NCS pin on port 2.

What we doing wrong here?

How we should configure the other parameters of the QCTOSPI in STM32cube for the used RAM chip?
OCTOSPI1

OCTOSPI2:

[TDK]

The OCTOSPIM_P2_NCS pin is PG12 which isn't available on the LQFP64 package.

STM32H7B0RBTx is an LQFP64 package, rather small, so it has a limited number of pins. You'll have to move up to a larger package, at least the LQFP144, if you want to do this.

[KDJEM.1]

Hello @OGhis ,

For the STM32H7B0RBTx, the multiplexed mode is not supported because the OCTOSPIM_P2_NCS pin isn’t available.

the Multiplexed mode requires BOTH OCTOSPIM_P2_NCS AND OCTOSPIM_P1_NCS as mentioned in the RM0455 and in AN5050. 

May this discussion can help you.

I confirm the issue in STM32CubeMx and I reported internally.

Internal ticket number: 187830 (This is an internal tracking number and is not accessible or usable by customers).

Thank you.

Kaouthar

[OGhis]

Thanks
We have switch the MCU to a 144 pins and now we can configure the 2 QSPI.

Can we have also an answer on my second question?
==> How we should configure the other parameters of the QCTOSPI in STM32cube for the used RAM chip? (see first message)

[KDJEM.1]

Hello @OGhis ,

Could you please refer to AN5050 "Table 7. STM32CubeMX - Configuration of OCTOSPI signals and mode" and "Table 8. STM32CubeMX - Configuration of OCTOSPI parameters" and get inspired to configure two QSPI RAM in multiplexed mode.

These two tables give some examples of OCTOSPI configurations. 

I hope this help you.

Thank you.

Kaouthar