2022-12-05 07:29 AM
Hello,
We are working on a project since some years so it begin to be quite big.
We are running FreeRTOS under the cmsisOs2 API.
Recently, we added an external flash on our SPI bus and started to experience timings issues:
The SPI is using HAL with transmit/receive in IT mode (priority 5).
We found that in receive mode, the CPU is quite stressed by ITs and the HAL IT handler.
It results that our systick (priority 0) is missing 12 preemption over 13 (one every 13 ms) when we do these reads.
I will configure DMA bus on this SPI to free CPU, but first i want to be sure i don't made a mistake in NVIC configuration.
In my understanding, even if an IT is currently running, an IT with higher priority can preempt it and do its execution before returning to the previous IT context.
Why in my case systick handler don't "ake the lead"? Even if the SPI IT has returned...
In the traces below, i toggled GPIOs at IT contexts enter/exit. As you can see, systick is executing normally until SPI reads, where we clearly see that systick wait a big gap to execute...
I suspect FreeRTOS to modify priorities....
2022-12-05 08:56 AM
Set the SPI IRQ priority to 15 and check the results. You may easily check the SysTick priority with a debugger.
2022-12-05 09:12 AM
+1
Check what the NVIC settings are, especially the priority grouping.
Not clear from post which STM32 or Cortex-M is being discussed.
2022-12-06 01:08 AM
We're running on stm32WB55RG chips.
Since we're using HAL init, there is no grouping:
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
Changing priority to 15 actually worked, but i don't get why:
HAL_NVIC_SetPriority(SPI1_IRQn, 15, 0);
I believed since a priority value is lower than another (ex: 0<5), it will preempt it?
2022-12-06 01:21 AM
After checking, it seems that SCB->SHP[11] = 240 (decimal)
I'm investigating on this...
2022-12-06 01:50 AM
After some investigations, i found something.
This is the default stm32L4 configuration file for FreeRTOS: link
Line 136, we have:
/* Interrupt priorities used by the kernel port layer itself. These are generic
to all Cortex-M ports, and do not rely on any particular library functions. */
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
Why FreeRTOS, a RealTime OS, is setting it's systick to the lowest priority?
Is it to the user to prevent application from high CPU load?
reference: https://www.freertos.org/a00110.html