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STM32F767ZI + FreeRTOS SysTick HardFault

MKuhl.1
Associate II

Hey!

I'm not that experienced wit FreeRtos and i am facing a HardFault problem.

I want to use FreeRtos and created some tasks. But when the Systick Handler is called for the first time, it causes an Hardfaul Exeption. The Program Counter points to the SysTick_Handler. And after further investigation.

I could track it down to tasks.c:

/* The delayed list is not empty, get the value of the

         item at the head of the delayed list. This is the time

         at which the task at the head of the delayed list must

         be removed from the Blocked state. */

pxTCB = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList );

pxDelayedTaskList has 0x00000000 as Value and due to the comment i believe this should not be the case? Is this the cause?

After some researching, I have the suspicion that my IRQ Priority is not set correctly. But I am not quite sure what to change. As far as I know, the Systick IRQ Priority has to be the lowest, and therefore 15? At which Priority should the HAL TIM 6 Priority be set (which i use for the System Timebase Source). Has anyone faced a similar problem?

I am using the STM32CubeMX V5.1.0 with STM32Cube FW_F7V1.15.0

I am glad about any help.

5 REPLIES 5
JPeac.1
Senior

FreeRTOS has a kernel IRQ priority level. No interrupt service routine which references an RTOS API can have a higher priority. Check the FreeRTOS configuration header to see what the kernel priority level is.

MKuhl.1
Associate II

0693W00000UnZzCQAV.png0693W00000UnZyxQAF.png

MKuhl.1
Associate II

These are my Interrupt Configuration settings. All the Interrupt handlers seem to have the same Priority as the the configLIBRARY_MAX_SYSCALL_INTERRUPT PRIORITY. Which seem to be ok. Or am I missing something?

hs2
Senior

You were talking about TIM6 but the screenshot shows TIM 5 (at wrong prio NVIC 0) ?

Do you verify/check that all tasks were created succesfully with sufficient stack ?

Do you ensure that no ISR is invoked before all FreeRTOS resources (queues, semaphores, etc) used in those ISRs are created ?

I'd recommend to have a look at this related FreeRTOS documentation for details regarding NVIC interrupt prios:

https://www.freertos.org/RTOS-Cortex-M3-M4.html

and this very good FreeRTOS forum posts:

https://forums.freertos.org/t/what-is-config-kernel-interrupt-priority/11501/8

https://forums.freertos.org/t/understanding-priority-levels-of-isr-and-freertos-apis/10453/16

It's OK for HAL timebase interrupt to be above configMAX_SYSCALL_INTERRUPT_PRIORITY. One just cannot use any FreeRTOS API in such interrupts.

Also this link:

https://www.freertos.org/a00110.html#kernel_priority