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stm32f429zi freertos hardfault

PanMaltan
Associate

Hello,

 

trying to port Miro Samek's example: https://github.com/QuantumLeaps/FreeACT - into my nucleo-F429ZI board.

As a reference there is project running on nucleo-h743zi

 

what i did:

changed all configs to be STM32F429zi valid, changed ld file, makefile, etc etc.

 

When running software (via debugger), unfortunatelly i got hardfault in this piece of code (rtos-port-part: port.c)

 

static void prvPortStartFirstTask( void ) { /* Start the first task. This also clears the bit that indicates the FPU is * in use in case the FPU was used before the scheduler was started - which * would otherwise result in the unnecessary leaving of space in the SVC stack * for lazy saving of FPU registers. */ __asm volatile ( " ldr r0, =0xE000ED08 \n"/* Use the NVIC offset register to locate the stack. */ " ldr r0, [r0] \n" " ldr r0, [r0] \n" " msr msp, r0 \n"/* Set the msp back to the start of the stack. */ " mov r0, #0 \n"/* Clear the bit that indicates the FPU is in use, see comment above. */ " msr control, r0 \n" " cpsie i \n"/* Globally enable interrupts. */ " cpsie f \n" " dsb \n" " isb \n" " svc 0 \n"/* System call to start first task. */ " nop \n" " .ltorg \n" ); } after dissamebly looks like this:

 

PanMaltan_0-1732489702605.png

after i step to next line, r0=0x0

PanMaltan_1-1732489800934.png

when i want to go next line, i end up in hardfault handler:

PanMaltan_2-1732489844410.png

 

CFSR, HFSR:

0xe000ed28: 0x00000082 0x40000000 0x00000001 0x00000000
reading CFRS i know that  Data Access Violation occurred but my question is why?
 
 

 

#define configKERNEL_INTERRUPT_PRIORITY ( 15 << 4 ) /* Priority 7, or 255 as only the top three bits are implemented. This is the lowest priority. */ /* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!! See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */ #define configMAX_SYSCALL_INTERRUPT_PRIORITY ( 5 << 4 ) /* Priority 5, or 160 as only the top three bits are implemented. */

 

but it didnt help.

 

ld is relatively simple(just modified from other nucleo project and adjusted to F429zi specific): 

 

/***************************************************************************** * Product: Linker script for STM32F429zi, GNU-ARM linker *****************************************************************************/ OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") OUTPUT_ARCH(arm) ENTRY(Reset_Handler) /* entry Point */ MEMORY { /* memory map of STM32F429ZI */ CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 192K ROM (rx) : ORIGIN = 0x08000000, LENGTH = 2048K } /* The size of the stack used by the application. NOTE: you need to adjust */ STACK_SIZE = 4096; /* The size of the heap used by the application. NOTE: you need to adjust */ HEAP_SIZE = 1024; SECTIONS { .isr_vector : { /* the vector table goes FIRST into ROM */ KEEP(*(.isr_vector)) /* vector table */ . = ALIGN(4); } >ROM .text : { /* code and constants */ . = ALIGN(4); *(.text) /* .text sections (code) */ *(.text*) /* .text* sections (code) */ *(.rodata) /* .rodata sections (constants, strings, etc.) */ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ KEEP (*(.init)) KEEP (*(.fini)) . = ALIGN(4); } >ROM .preinit_array : { PROVIDE_HIDDEN (__preinit_array_start = .); KEEP (*(.preinit_array*)) PROVIDE_HIDDEN (__preinit_array_end = .); } >ROM .init_array : { PROVIDE_HIDDEN (__init_array_start = .); KEEP (*(SORT(.init_array.*))) KEEP (*(.init_array*)) PROVIDE_HIDDEN (__init_array_end = .); } >ROM .fini_array : { PROVIDE_HIDDEN (__fini_array_start = .); KEEP (*(.fini_array*)) KEEP (*(SORT(.fini_array.*))) PROVIDE_HIDDEN (__fini_array_end = .); } >ROM _etext = .; /* global symbols at end of code */ .stack : { __stack_start__ = .; . = . + STACK_SIZE; . = ALIGN(4); __stack_end__ = .; } >RAM .data : AT (_etext) { __data_load = LOADADDR (.data); __data_start = .; *(.data) /* .data sections */ *(.data*) /* .data* sections */ . = ALIGN(4); __data_end__ = .; _edata = __data_end__; } >RAM _siccmram = LOADADDR(.ccmram); /* CCM-RAM section * * IMPORTANT NOTE! * If initialized variables will be placed in this section, * the startup code needs to be modified to copy the init-values. */ .ccmram : { . = ALIGN(4); _sccmram = .; /* create a global symbol at ccmram start */ *(.ccmram) *(.ccmram*) . = ALIGN(4); _eccmram = .; /* create a global symbol at ccmram end */ } >CCMRAM AT> RAM .bss : { __bss_start__ = .; *(.bss) *(.bss*) *(COMMON) . = ALIGN(4); _ebss = .; /* define a global symbol at bss end */ __bss_end__ = .; } >RAM __exidx_start = .; .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } >RAM __exidx_end = .; PROVIDE ( end = _ebss ); PROVIDE ( _end = _ebss ); PROVIDE ( __end__ = _ebss ); .heap : { __heap_start__ = .; . = . + HEAP_SIZE; . = ALIGN(4); __heap_end__ = .; } >RAM /* Remove information from the standard libraries */ /DISCARD/ : { libc.a ( * ) libm.a ( * ) libgcc.a ( * ) } }
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any support appriciated!

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