Posted on June 20, 2015 at 18:59Hello All,
I have configured the STM32F417VG Ethernet peripheral, attached it to the LAN8720 PHY interface, configured it all for RMII operation, and established a successful link from my target board (STM32F4 Discovery with BB shield).
I have confirmed that communication between the MAC and PHY is happening and that it is correct (via logic analyzer).
I have accounted for device errata (specifically : sequential writes to MAC registers and possible transmit frame corruption when not in store-and-forward mode).
I wrote a quick test program to setup a RX descriptor that points to a single buffer and operates as a ring.
I have confirmed that the oscillator clock out of the PHY to the MAC is at 50 MHz (clean sine wave).
The problem I am having is that the received Ethernet frame does not appear to be valid. Below is the first part of an actual received frame:
FF FF FF FF FF FF FF FF 99 4C A6 53 08 04 82 C1 08 04 02 01 00....
Wireshark running on my laptop shows this differently and indicates it is an ARP broadcast (makes sense: plugged into a router, router trying to figure out who I am).
The first six bytes are the broadcast MAC and the second are the source MAC. The next two are supposed to be 08 06 for ARP. They are 08 04. There does not appear to be any definition for this ID type. The second MAC address is also strange in the it does not match the MAC address of the router.
I have confirmed that the receive descriptor is updated and its status bits indicate that the message is of Ethernet type IPv4 or IPv6.
I have tried enabling frame CRC checking and the messages still come through identical, so it does not appear to be message corruption (or at least detectible corruption).
I cannot explain why this data appears in RAM as it does.
Note 1 : Before enabling DMA RX, I explicitly fill the receive buffer with 0x00 to make sure the buffer is actually being written by the DMA controller.
Note 2 : I have played with different routers and aside from the source MAC address changing, everything else is consistently puzzling.
Anyone seen this before? Maybe have some ideas what could be going on? Perhaps I am not paring the DMA buffer data correctly?
Regards,
Daniel
#ethernet-stm32f4
