> we have observed that the FIFO full and overflow is happening @Spi slave while receiving the data stream @1Mbps.
Use DMA to retrieve data before the FIFO fills up. You can also use interrupts, but code needs to be fast enough to keep up.
Using circular DMA which is always enabled and polling for new data occasionally (or using the half- and full-complete interrupts to do so) is a common and viable strategy.
If you feel a post has answered your question, please click "Accept as Solution".
