SPI slave and SSI bit

[Lukasz Przenioslo]

Hi there,

Lets say my device is configured as an SPI slave device with a software NSS pin. The STM32 HAL API doesn't use the SSI bit from CR1 register at all. I was wondering, what actually happens to the SPI peripheral when I manually set or clear that bit? If I call HAL_SPI_TransmitReceive_IT and then call CLEAR_BIT(spis->hSpi->Instance->CR1, SPI_CR1_SSI), will that mean that any data clocked to the SPI slave device will be just ignored without affecting the state of the SPI slave peripheral? I am actually trying to implement this functionality- In the system there is one master any many slaves that are chosen via separate NSS pins. In my slave device code, I am handling the NSS signal manually as EXTI input and I want to set/ clear the SSI bit there. Is this approach correct, or do I not understand something?

I have found this topic, but its left unanswered. The author seems confused too.

I would appreciate all help.

[waclawek.jan · Accepted solution]

If SSM is set, SSI's function is the same as the NSS pin's when SSM is cleared.

JW

[Lukasz Przenioslo]

Thank you for answer,

So if I understand correctly, after SSM is set (software NSS mechanism), I need to clear the SSI anytime I want to receive as slave and set SSI anytime I dont want to receive anything (my MISO stays high-Z)?

[waclawek.jan]

Yes.

JW