2021-10-07 12:09 PM
I am now ready to write to flash when receiving a file upload via my webserver. However, I read that when erasing or writing to flash, flash reads are blocked. I can see this causing problems.
The LwIP_IAP example which was written for the F407 must work, but it doesn't use FreeRTOS. I can see that it would be way easier to do with a 2 Bank part such as the F429 as I intend to split the flash in half so I can run from one section and upgrade the other.
I have seen suggestions to run from RAM but that doesn't seem very practical when you have LwIP, FreeRTOS and a webserver running to upload the firmware...
Any ideas?
Solved! Go to Solution.
2021-10-07 12:50 PM
That is basically it. On the F407 you have no choice. Any write/erase FLASH operation will stall the CPU if it tries to execute code from FLASH. So either structure your code to tolerate the stall (difficult w/RTOS) or move code into RAM (also difficult 'cause hard to know WHICH functions will be called). Using a dual bank part like the F429 would work as long as you are running from bank 1 and writing to bank 2.
2021-10-07 12:50 PM
That is basically it. On the F407 you have no choice. Any write/erase FLASH operation will stall the CPU if it tries to execute code from FLASH. So either structure your code to tolerate the stall (difficult w/RTOS) or move code into RAM (also difficult 'cause hard to know WHICH functions will be called). Using a dual bank part like the F429 would work as long as you are running from bank 1 and writing to bank 2.
2021-10-07 01:41 PM
Or use external memory. Serial FLASH, megabits'a'cent.
JW
2021-10-07 03:53 PM
I really like this solution but it will mean a board spin...
2021-10-07 05:30 PM
Why is it a problem if the flash blocks for a while? On any piece of hardware where I've updated the firmware, it's universally accepted that it will be nonresponsive for a period of time during the update (and that you shouldn't remove power).