OCTOSPI: NCS stays high on STM32U5A9

[Meixner]

I am trying to access a NOR flash via OctoSPI1. CLK is connected to PF4, NCS is connected to PI5. While I can see clock cycles on PF4, PI5 stays high all the time.

Does anyone have an idea, what could be wrong?

Trust zone is disabled. The register settings are as follows:

OCTOSPI1:
CR: 0x10000000
DCR1: 0x001F0008
DCR2: 0x00000001
DCR3: 0x00000000
DCR4: 0x00000000
SR: 0x00000000
DLR: 0x00000002
AR: 0x00000000
DR: 0x00000000
PSMK: 0x00000000
PSMAR: 0x00000000
PIR: 0x00000000
CCR: 0x01000001
TCR: 0x00000002
IR: 0x00000090
ABR: 0x00000000
LPTR: 0x00000000
WPCCR: 0x00000000
WPTCR: 0x00000000
WPIR: 0x00000000
WPABR: 0x00000000
WCCR: 0x00000000
WTCR: 0x00000000
WIR: 0x00000000
WABR: 0x00000000
HLCR: 0x00000000

OCTOSPIM:
CR: 0x00000000
P1CR: 0x02000000
P2CR: 0x06010121

GPIOI:
MODER: 0xFFF55BBF
OTYPER: 0x00000000
OSPEEDR: 0x00000cc0
PUPDR: 0x00000000
IDR: 0x00000020
ODR: 0x00000000
BSSR: 0x00000000
LCKR: 0x00000000
AFRL: 0x00506000
AFRH: 0x00000000
BRR: 0x00000000
SECCFGR: 0x0000FFFF

[Tesla DeLorean]

Not sure of wiring / initialization but guessing OCTOSPIM mixing for P2 NCS CLK is wrong

[Meixner]

The problem with nCS is solved. There was a first activation of the clock without activating nCS and way later the clock was activated a second time, this time with activating nCS. The communication problem was not due to nCS, but due to HAL_OSPI_Receive_DMA not working as expected.

[FBL]

Hello @Meixner 

A detailed description or the initialization/configuration would be helpful to understand the issue. The registers do not seem to be set correctly. Could you explain what is wrong with HAL_OSPI_Receive_DMA?