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Meixner · 2024-07-16

Hello, I have a problem with unaligned access, which generates a hard fault when the software is started without bootloader.When running the same software from mcuboot bootloader, there is no hard fault on unaligned access.The MPU and TrustZone confi...

Meixner · 2024-01-08

I am trying to use TrustZone on STM32U5A9:I am setting up the following regions in SAU:0xc1fe000-0xc1fffff non-secure callable0x8200000-0x83fffff non-secure0x200c0000-0x20273fff non-secure0x60000000-0x6fffffff non-secureAs soon as I flip the enable f...

Meixner · 2023-10-05

I am trying to access a NOR flash via OctoSPI1. CLK is connected to PF4, NCS is connected to PI5. While I can see clock cycles on PF4, PI5 stays high all the time.Does anyone have an idea, what could be wrong?Trust zone is disabled. The register sett...

Meixner · 2024-07-17

I have found the issue: MAIR configuration was written to MAIR1 instead of MAIR0.

Meixner · 2024-01-15

In the meantime I got it working. What was not really clear was that the GTZC configuration must match the SAU/IDAU configuration.The ARM documentation that secure code may access non-secure regions does not apply for the case that the SAU/IDAU confi...

Meixner · 2023-10-09

The problem with nCS is solved. There was a first activation of the clock without activating nCS and way later the clock was activated a second time, this time with activating nCS. The communication problem was not due to nCS, but due to HAL_OSPI_Rec...

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Hard fault on unaligned access on STM32U5

Enabling TrustZone non-secure internal flash and ram reads as zero from secure state

OCTOSPI: NCS stays high on STM32U5A9

Re: Hard fault on unaligned access on STM32U5

Re: Enabling TrustZone non-secure internal flash and ram reads as zero from secure state

Re: OCTOSPI: NCS stays high on STM32U5A9