I have a project using STM32H745 processor that has network connectivity. All works awesome until the processor temp reaches about 120 F, then I start to lose connectivity. I am using RMII interface and again works perfectly at high bandwidth when < 120F

[DPitt.1]

What could be the cause. I have checked the power circuitry. The rest of application still functions well. DMA, Timers, SPI, etc. Just network data is stalled. When temp goes down it resumes.

[TDK]

Could be loss of signal integrity on the RMII or ethernet lines. Typically signal integrity degrades as temperature increases. Are these traces short and relatively length matched? Lots of vias? Passing over other high-frequency signals?

[LMI2]

Is 120 F a lot. It feels hot i know, but is your CPU ok.

[DPitt.1]

These are great ideas and we have been exploring them. Improvements will be surely made on next board to improve all your points.

[DPitt.1]

120 F is temp measured by CPU internal temp sensor. I agree that is not real high for a CPU. So would you think it is most likely signal integrity as the CPU has been tested to preform at much higher temperatures?

[DPitt.1]

Here are the trace measurements for RMII signals. The PHY to RJ-45 connections are short and have proven to work on 4 other designs so I doubt the issue is on that side.

CLK - 1962 mils

TXD0 - 2266 mils

TXD1 - 2293 mils

TX_EN 2153 mils

RXD0 - 1995 mils

RXD1 - 2088 mils

MDIO - 1820 mils

CRS_DIV - 2173 mils

[waclawek.jan]

> processor temp reaches about 120 F

How much is that in international units?

What is your power source and clocks arrangement? What PHY are you using?

JW

[Tesla DeLorean]

From freedom units into Celsius that's about 48.9 C

If the network is problematic, perhaps look at the clocking.

Using an HSE? how is the clock generated for the RMII ?

Crystal, or XO?

[DPitt.1]

120 F is about 48 C.

I am using the Microchip LAN9303 switch chip. The layout and schematic of switch chip was almost completely copying from 4 previous designs that used same chip. I am highly confident that this is not the issue. The only new component is the STM32H745 to the equation and the routing of the RMII traces which actually have slightly better matched trace lengths than the past working designs.

The clocking is provided via the LAN9303 switch chip (50 Mhz OSC output) to the MAC of the STM32. The switch chip uses a 25 MHz crystal to generate its timing.

We are using a 24 MHZ OSC input into the HSE and use PLL of STM32 to create 480 and 240 MHz clocks to respectively to CPUs.

I have also tried using HSI clock as source to PLL and have got same result.

[waclawek.jan]

50°C is not that much indeed. My bet was on that you're using RMII clock derived from the mcu's PLL which could be affected by temperature, but that's not the case.

Are power supply voltages rock stable? Are VCAP voltages rock stable? Are VCAP capacitors OK? Is the IO voltage identical to the PHY's IO voltage? Is this one single prototype? Could you add a small 10-22R) resistor in series to the RMII clock? Is compensation cell switched on? Try to tweak the GPIO_MODER values for the output signals, does it make any difference?

JW