2025-03-08 9:02 PM - edited 2025-03-09 7:09 PM
Hi,
the application gets stuck on the Error_Handler() in the piece of code below in main.c
hdsi.Instance = DSI;
hdsi.Init.AutomaticClockLaneControl = DSI_AUTO_CLK_LANE_CTRL_DISABLE;
hdsi.Init.TXEscapeCkdiv = 4;
hdsi.Init.NumberOfLanes = DSI_TWO_DATA_LANES;
hdsi.Init.PHYFrequencyRange = DSI_DPHY_FRANGE_80MHZ_100MHZ;
hdsi.Init.PHYLowPowerOffset = PHY_LP_OFFSSET_0_CLKP;
PLLInit.PLLNDIV = 32;
PLLInit.PLLIDF = DSI_PLL_IN_DIV1;
PLLInit.PLLODF = DSI_PLL_OUT_DIV2;
PLLInit.PLLVCORange = DSI_DPHY_VCO_FRANGE_500MHZ_800MHZ;
PLLInit.PLLChargePump = DSI_PLL_CHARGE_PUMP_2000HZ_4400HZ;
PLLInit.PLLTuning = DSI_PLL_LOOP_FILTER_2000HZ_4400HZ;
if (HAL_DSI_Init(&hdsi, &PLLInit) != HAL_OK)
{
Error_Handler();
}
I just noticed that DSI lane clock is set to 32MHz - screenshot below - from the HSE (8MHz crystal) which seems too low. To what frequency (in the clock diagram page) do I set the two DSI clocks (DSI TXCLKESC and DSI lane byte clock)? How is that calculated?
Attached is the .IOC file with the current DSI settings if it helps.
Thank you :)
Rick
2025-03-12 5:23 AM
Hello @Ricko;
The lane_byte_clk is calculated using the following formula:
FVCO=(HSE/IDF) X 2 XNDIV
Lane_Byte_CLK = FVCO / (2 x ODF x 8)
The Tx escape clock is calculated as follows: TX escape CLK = Lane_byte_CLK / TXECKDIV
Note: TXECKDIV must be programmed to ensure that the TX escape clock is less than 20 MHz.
The TX prescaler must be set to a value higher than 2. A prescaler value 0 or 1 disables the generation of the TX escape clock.
I recommend you to look at AN4860 and precisely 5.1.2 Clocks configuration section which mentioned a calculation example and DSI clock scheme.
Thank you.
Kaouthar
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