2019-10-04 01:25 PM
Hi all,
I am using STM32F103C8T6 but would like to maintain if possible processor neutral discussion on how to disable SWO pin while debugging.
So in the case with STM32F103C8T6 SWO pin is also shared with SPI CLK and while debugging this pin becomes unusable to SPI which is problematic. While I am not using SWO trace output I would like to maintain SPI CLK functionality , how can I disable that transition to SWO pin with original ST-Link?
It seems that Segger has possible solution with command SWOStop:
https://github.com/sudolee/embedded/blob/master/dl-debug/JLink-commands-list.txt
Tnx in advance!
2019-10-04 03:11 PM
Aren't there multiple SWD-DP mapping options on the F1? Been a while since I checked. Turn the AFIO clock on. JTAG-DP Disable, SW-DP Enabled