Steps to perform Firmware Upgrade using ST25DV dynamic tag

[Nikhil D&K]

Hello,

I would like to know how can i perform the Device Firmware upgrade using ST25DV dynamic tag.I am using "en.STSW-ST25DV001SC-Source_v1.2.0" and tried out both demonstration examples

1. ST25DVDemo ( firmware update using internal flash)

I am able to perform firmware update using ST25DV demo example, but after reset it jumps to original firmware.

So i would like to know how can i implement a firmware upgrade feature using "ST25DVDemo" example so that after reset it boots to the uploaded firmware instead of the old firmware.

Thanks,

Nikhil.

[Rene Lenerve]

Hi @NK.13omalan​,

Access to the USER memory doesn't need to open an I²C session. Access to the tag EEPROM of ST25DVxxK or ST25DVxxKC is identical, what could be the issue is the Reference IC number which is 0x24 or 0x26 for ST25DVxxK and 0x50 or 0x51 for ST25DVxxKC if it is checked by the firmware before.

1. For the mailbox the ST25DVxxKC register has changed a little bit, please read the AN5633 chapter 5.2.3 to check if the Mailbox is correctly deactivated. (MB_MODE vs FTM, MB_WDG vs I2C_CFG).
2. As in the first point can you check that the mailbox is properly configured while accessing the mailbox, GPO register has also changed, please check it too, chapter 5.2.1 and 5.2.2 (GPO is used in the FTM example).

I hope this can help you.

Kind Regards.

[Nikhil D&K]

Hello @Rene Lenerve​ ,

EEPROM Issue:

The reference IC number read from my ST25DVxxKC is 0x50.

Below is the reference code snippet which i am using to write and read from EEPROM. Both the write and read operations are not working via firmware although the same operations are working using android app.

/* Initialize ST25DV */
ST25_RETRY(BSP_NFCTAG_Init(BSP_NFCTAG_INSTANCE));
 
BSP_NFCTAG_ResetMBEN_Dyn(BSP_NFCTAG_INSTANCE);
 
HAL_Delay(1000);
 
uint8_t tx_buff[4] = {0x11,0x22,0x33,0x44}, rx_buff[4] = {0};
 
ret = BSP_NFCTAG_Write_EEPROM(BSP_NFCTAG_INSTANCE, &tx_buff[0], 0x0004, sizeof(tx_buff));
 
HAL_Delay(1000);
 
if(ret == HAL_OK)
{
	ret = BSP_NFCTAG_Read_EEPROM(BSP_NFCTAG_INSTANCE, &rx_buff[0], 0x0004, sizeof(rx_buff));
}	

So can you please help us to diagnose the above issue ?

Firmware Upgrade Issue:

Below are the logs printed out after receiving of complete first segment (i.e 20 packets) when i use "ST25DV04K". Here as you can see in the logs, on the line 11 the Rx state changes to FTM_READ_WAIT_ACK_READ and everything works fine.

[12:06:56:122] 22397 pkt.length - 0xf3�??�?�
[12:06:56:122] 22400 pkt.totalLength - 0x0�??�?�
[12:06:56:128] 22402 pkt.ctrl.byte - 0x69�??�?�
[12:06:56:128] 22405 pkt.crc - 0x0�??�?�
[12:06:56:128] 22407 pkt.has_crc - 0x0�??�?�
[12:06:56:134] 22409 GetCrc 2004fe5a 243�??�?�
[12:06:56:134] 22412 ST25FTM_GetCrc : 0x93c045fe�??�?�
[12:06:56:139] 22415 segment_crc : 0x93c045fe�??�?�
[12:06:56:139] 22418 computed_crc : 0x93c045fe�??�?�
[12:06:56:145] 22421 FtmRx TxAck�??�?�
[12:06:56:145] 22422 RxState = FTM_READ_WAIT_ACK_READ�??�?�
[12:06:56:156] Alert pin INT �??�?�
[12:06:56:158] 22437 lastAck=1�??�?�
[12:06:56:163] 22439 ignoreRetrans=0�??�?�
[12:06:56:163] 22441 Ending Segment 0�??�?�
[12:06:56:169] 22443 receivedLen=4951�??�?�
[12:06:56:169] 22445 validLen=4951�??�?�
[12:06:56:169] 22447 totalvalid=4951�??�?�
[12:06:56:169] 22449 FtmRx Continue reception�??�?�
[12:06:56:180] 22459 RxState = FTM_READ_CMD�??�?�
[12:06:56:257] Alert pin INT �??�?�

Now when i use the "ST25DV04KC", after reception of one full segment the RxState doesn't changes to FTM_READ_WAIT_ACK_READ state.

[12:06:56:122] 22397 pkt.length - 0xf3�??�?�
[12:06:56:122] 22400 pkt.totalLength - 0x0�??�?�
[12:06:56:128] 22402 pkt.ctrl.byte - 0x69�??�?�
[12:06:56:128] 22405 pkt.crc - 0x0�??�?�
[12:06:56:128] 22407 pkt.has_crc - 0x0�??�?�
[12:06:56:134] 22409 GetCrc 2004fe5a 243�??�?�
[12:06:56:134] 22412 ST25FTM_GetCrc : 0x93c045fe�??�?�
[12:06:56:139] 22415 segment_crc : 0x93c045fe�??�?�
[12:06:56:139] 22418 computed_crc : 0x93c045fe�??�?�
[12:06:56:145] 22421 FtmRx TxAck�??�?�
[12:06:56:169] 22449 FtmRx Continue reception�??�?�
[12:06:56:180] 22459 RxState = FTM_READ_CMD�??�?�
[12:06:56:257] Alert pin INT �??�?�

Can you please let me know what could be the issue here ?

[Rene Lenerve]

Hi @NK.13omalan​,

EEPROM Issue:

What is the return code of the function BSP_NFCTAG_Write_EEPROM?

Can you also read the content of the register MBEN_Dyn after disabling it(you can use this BSP_NFCTAG_GetMBEN_Dyn or this one BSP_NFCTAG_ReadMBCtrl_Dyn).

Firmware Upgrade Issue:

Let's fix the EEPROM issue first then come back to this one after (it could be related).

kind Regards.

[Nikhil D&K]

Hello @Rene Lenerve​ ,

Firmware Upgrade Issue: Solved

EEPROM Issue:

Below is the code snippet which i am using to write and read data from EEPROM. After disabling mailbox, reading the dynamic register value gives 0x00 (i.e Mailbox off).

WRITE OPERATION ISSUE:

Using write data function we were successfully able to write data to EEPROM at different block address but for some reason i am not able to write to a particular block address 0x0024, return error code while writing operation is 0 (success). I am able to write at all other block address.

READ OPERATION ISSUE:

Even though i am able to write to the 0x0000 block address, i am unable to read data from the same address. The return error code while performing read operation is 0 (i.e) success, but when i check the read value it gives 0x00. Below in the code snippet i have also shown how i am reading the EEPROM data.

/* Initialize ST25DV */
ST25_RETRY(BSP_NFCTAG_Init(BSP_NFCTAG_INSTANCE));
 
/* Dsiabling the mailbox */
ret = BSP_NFCTAG_ResetMBEN_Dyn(BSP_NFCTAG_INSTANCE);
 
/* Read mailbox dynamic register */
//Read Mailbox Mode value (mb_mode)= 0x00;
ret = BSP_NFCTAG_GetMBEN_Dyn(BSP_NFCTAG_INSTANCE,&mb_mode);
 
HAL_Delay(500);
 
uint8_t tx_buff1[4] = {0x11,0x24,0x36,0x48}, rx_buff[4] = {0};
uint8_t tx_buff2[4] = {0x10,0x20,0x30,0x40};
 
ret = BSP_NFCTAG_Write_EEPROM(BSP_NFCTAG_INSTANCE, &tx_buff1[0], 0x0024, sizeof(tx_buff1));
HAL_Delay(20);
ret = BSP_NFCTAG_Write_EEPROM(BSP_NFCTAG_INSTANCE, &tx_buff2[0], 0x0028, sizeof(tx_buff2));
 
HAL_Delay(500);
 
 
/* Reading operation is succesfful but data read is 0. */    
if(ret == HAL_OK)
{
ret = BSP_NFCTAG_Read_EEPROM(BSP_NFCTAG_INSTANCE, &rx_buff[0], 0x0024, sizeof(rx_buff));
ret = BSP_NFCTAG_Read_EEPROM(BSP_NFCTAG_INSTANCE, &rx_buff[0], 0x0028, sizeof(rx_buff));
}

So can you please help us to resolve this EEPROM write and read issue ?

[Rene Lenerve]

Hi @NK.13omalan​,

That's strange there is no difference between address 0x0024 and 0x0028, I tried on my side your code and it was working correctly (read and write) for me. Do you have the possibility to try another ST25DV chip to check that your chip is ok?

Can you send the content of rx_buff1 and rx_buff2 using the following functions (or corresponding function in your code):

uint8_t rx_buff1[32] = {0};
uint8_t rx_buff2[8] = {0};
 
BSP_NFCTAG_ReadRegister( 0, rx_buff1, 0x0000, 32 );
 
BSP_NFCTAG_ReadData( 0, rx_buff2, 0x2000, 8 );

To see if there is nothing wrong in your configuration.

Great, that you solved your issue for the second topic.

Kind regards.

[Nikhil D&K]

Hello @Rene Lenerve​ ,

Hope you are doing well.

I am currently migrating the code from STM32L496 to STM32L4A6 having NFC DFU feature.

Currently the issue i am facing is i am able to swap updated firmware from Bank 1 to Bank 2. But when i am upgrading firmware from Bank 2 to bank 1, for some odd reason after downloading the full file in Bank 1 the controller resets. So bank swap doesn't happen.

Can you please help me find the difference between STM32L496 and STM32 L4A6 nfc dfu process ?

[Nikhil D&K]

Hello @Rene Lenerve ,

Hope you are doing well. I am once again stuck with the dual bank issue.

In our product we have changed our MCU to  STM32L496VGTX. Currently i was able to download new firmware into the bank 2 but after swapping banks and reset the new firmware is not getting loaded.  Used the system init and swap bank function provided by you before.  

I have tried to implement the same issue in a standalone project which i have attached for your reference. Where demo binary example (Red led blinking f.w)  is programmed at address 0x08080000 (bank 1) using STLink Utility. 

Now using STM32Cube IDE i am running code on bank 0, with Blue led blinking. On button press the banks will swap and reset will take place. But for some reason i am unable to switch to new firmware. 

Can you please look into this issue. I have attached  the firmware file containing all the code needed for bank swap.

[Rene Lenerve]

Hi @nikhil D&K

Please create a new thread for this new question, it will be seen by more people as this thread has been marked as resolved. And if you post it in the MCU section more people with MCU interest will see your post and could answer to you.

I do not have an STM32L496 MCU to check your code, but if you read the reference manual there is a section for the bank swapping that mentioned :

---

---

When booting from bank 2, the boot loader will swap the Flash memory banks.
Consequently, in the application initialization code, you have to relocate the vector table to
bank 2 swapped base address (0x0800 0000) using the NVIC exception table and offset
register.

Kind Regards.

[Nikhil D&K]

Hello @Rene Lenerve ,

I have already created the new thread and no one have shown interest in solving my issue yet. So had to get in touch with you. 

In Sysytem_Init function in system_stm32l4xx.c file, i am relocating vector table using the below line:: 

SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */

Here is the full function code : 

void SystemInit(void)

{

/* FPU settings ------------------------------------------------------------*/

#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)

SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */

#endif

/* Reset the RCC clock configuration to the default reset state ------------*/

/* Set MSION bit */

RCC->CR |= RCC_CR_MSION;

/* Reset CFGR register */

RCC->CFGR = 0x00000000;

/* Reset HSEON, CSSON , HSION, and PLLON bits */

RCC->CR &= (uint32_t)0xEAF6FFFF;

/* Reset PLLCFGR register */

RCC->PLLCFGR = 0x00001000;

/* Reset HSEBYP bit */

RCC->CR &= (uint32_t)0xFFFBFFFF;

/* Disable all interrupts */

RCC->CIER = 0x00000000;

/* Configure the Vector Table location add offset address ------------------*/

#ifdef VECT_TAB_SRAM

SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */

#else

SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */

#endif

}

So can you please look into the issue or forward your colleague the project which i have sent i am currently stuck with this problem. 

[Rene Lenerve]

Hi @Nikhil D&K ,

Maybe the simplest solution would be to start from a working example, if you download the STM32CubeL4 1.18.0 package, you will found an example for dual bank with STM32CubeIDE as project for the L496.

STM32Cube_FW_L4_V1.18.0\Projects\NUCLEO-L496ZG\Examples\FLASH\FLASH_DualBoot\STM32CubeIDE

If you succeeded in running this example just adapt your code as per the example.

I ran same example for nucleo L476 successfully.

Hope this can help you.

Kind Regards.