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I there a i2c 'ping' command or something similar.

GMyer.1644
Associate

 I just need to verify the board design, (that the uP can reach the M24SR on i2c). The documentation seems to assume knowledge of the ISO protocols and I can't find complete packet examples.

1 ACCEPTED SOLUTION

Accepted Solutions
JP Miller
Senior

Hello and sorry for the late response,

Indeed M24SR I2C protocol at the application layer obeys to the ISO14443/ISO7816-4 standards.

The response from M24SR is considered as valid if the response bytes SW1 and SW2 are of respective values 0x90 and 0x00​.

M24SR may respond with an error. In that case SW1/SW2 will be different from 0x90/0x00 and will provide information on the error itself. Specific meanings can be found in the datasheet.

An example of an NDEF file read on the I2C bus is shown in the document:

https://www.st.com/content/ccc/resource/technical/document/application_note/f4/ce/4c/0e/28/0d/4d/38/DM00105043.pdf/files/DM00105043.pdf/jcr:content/translations/en.DM00105043.pdf

On the I2C bus level, M24SR is an I2C slave. It will not acknowledge a byte if it is not ready to handle that transfer and the access will need to be retried at a later point.

Have a good day.

Regards

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2 REPLIES 2
GMyer.1644
Associate

I found some examples in section 7.9 (i2c frame format) of m24sr65y_spec_sheet.pdf that has complete frames. No description of expected responses though.

JP Miller
Senior

Hello and sorry for the late response,

Indeed M24SR I2C protocol at the application layer obeys to the ISO14443/ISO7816-4 standards.

The response from M24SR is considered as valid if the response bytes SW1 and SW2 are of respective values 0x90 and 0x00​.

M24SR may respond with an error. In that case SW1/SW2 will be different from 0x90/0x00 and will provide information on the error itself. Specific meanings can be found in the datasheet.

An example of an NDEF file read on the I2C bus is shown in the document:

https://www.st.com/content/ccc/resource/technical/document/application_note/f4/ce/4c/0e/28/0d/4d/38/DM00105043.pdf/files/DM00105043.pdf/jcr:content/translations/en.DM00105043.pdf

On the I2C bus level, M24SR is an I2C slave. It will not acknowledge a byte if it is not ready to handle that transfer and the access will need to be retried at a later point.

Have a good day.

Regards