uPSD3434 Questions

[vasgrammatikakis]

Posted on July 05, 2007 at 16:35

uPSD3434 Questions

[vasgrammatikakis]

Posted on May 17, 2011 at 11:51

Hi,

Since ST Technical support has been ignoring us since February (due to extended staff problems) I am posting the following questions on the site and requesting help from anyone who has something to suggest. Thank you very much. The latest revision manual of uPSD3434 (July 2006) mentions the following problems 1)Incorrect Code Execution when Code Banks are Switched. It mentions ''The uPSD tools offered by Keil and Raisonance now include an updated version of l51_bank.a51 for the uPSD products that flushes the PFQ/BC. The most recent banking examples available from ST's website include the updated l51_bank.a51 files.'' Please specify the exact link for the updated l51_bank.a51 in St.com. Where can we find it exactly? 2) The MCU is specified to operate on Vcc from 3.0V to 3.6V max. However the LVD circuit that monitors the power supply and causes a RESET signal when power is low gives VRST_THRESH min 2.4V and max 2.8V. Is this correct? Does this mean that if the power falls below 3V the MCU might operate irrationally (i.e write to flash or RAM with errors) and the internal LVD will not cause a Reset? Please clarify. 3)The manual specifies for Port4 source/sink current of 10mA. For other ports half of that i.e 5mA and for PSD ports A,B,C,D source 2mA, sink 8mA. What is the total current per port and per pin that the device can support? i.e Can it support 10mA x 8 = 80 mA for Port4? We don't think this can happen. Soi please again clarify. What is the total power dissipation of the TQFP-80 package? 4)Can the RAM/flash be deselected during low power periods so as not to be written by the CPU. E.g if the MCU voltage is 2.9V, how can we assure RAM/flash integrity? Any suggestion will be deeply appreciated. Thanks again [ This message was edited by: vgram on 02-05-2007 13:05 ]

[jdaniel]

Posted on May 17, 2011 at 11:51

vgram,

For what it's worth, I'm playing with L51_BANK.A51 at the moment on a project with the uPSD3454. I've seen the note you mention where they say the latest versions of L51_BANK.A51 from Keil have corrected this problem. This shouldn't inspire confidence however, since I've found that it's what we in the business like to call ''not true.'' What's worse, if you simply go into the file and modify the section for XDATA register paging (which is what we'd use for uPSD), you'll find that adding those two lines causes various untoward things to happen unless you realign all the bank switching functions (namely, the RET's disappear and the code happily wanders off into oblivion). Let me know if you have any luck finding this modified file at ST. Otherwise, I'm going to proceed modifying it myself. -Jay Daniel