Issue with RWW Configuration Using OSPI1 and OSPI2 on STM32U5A9J-DK

[sohm]

Hi,

We are using the STM32U5A9J-DK board and are trying to achieve Read-While-Write (RWW) functionality. The flash chip we are using supports RWW.

Earlier, as per [this post](post link), we learned that to achieve RWW, we need two OSPI instances, namely OSPI1 and OSPI2.

Here are the configurations for both OSPI1 and OSPI2 in STM32CubeIDE:

• OSPI1 Configuration:
  
  
  
• OSPI2 Configuration: 
  
  
  
  
  

We tested the setup and observed the following:

1. Using OSPI1, we can successfully perform read, write, and erase operations on the flash memory.
2. However, when attempting to access the flash memory with OSPI2, we are unable to perform these operations.

Questions:

1. Is our current configuration of OSPI1 and OSPI2 (in multiplexed mode) correct for achieving RWW?
2. Can you provide an example application where RWW is implemented using OSPI1 and OSPI2?

We would greatly appreciate any insights or guidance on this issue.

Thank you!

[KDJEM.1]

Hello @sohm ,

Thank you for sharing this interesting case in the community.

However, when attempting to access the flash memory with OSPI2, we are unable to perform these operations.

->The Chip select pin is not configured for the OCTOSPI2 in OSPI2 configuration.

Is the issue solved when configuring the "Chip Select".

An RWW example is available in  https://github.com/STMicroelectronics/STM32CubeH7RS/tree/main/Projects/STM32H7S78-DK/Examples/XSPI/XSPI_NOR_ReadWhileWrite_DTR.

May be STM32CubeMX: OCTOSPI GPIOs configuration section in AN5050 can help you.

Thank you.

Kaouthar