Posted on December 26, 2007 at 05:28Hi *.*,
I’d like to share my experience with STR710F2 and get confirmation (or better disapproval to my findings).
SPI:
1. Old fact: In slave mode SS pin must be configured as input and connected to VCC.
I’ve figured out that SD flash connected over SPI is terribly slow. Further investigations show that:
1. Maximum effective SPI clock is 8 Mhz (48mhz/6). Really disappointing!
2. There is a ~3uSec gap between SPI clock bursts (I work in 8-bit mode). FIFO didn’t help – still gaps. Did anyone see that?
Internal Flash:
1. It is almost impossible to erase flash via JTAG if application does not have busy loop at the starting point. Pretty weird, but somehow mentioned in documentation.
2. Sometimes it is impossible to erase flash by the software – it just locks itself. Neither Write, Readout nor Debug un-protection help. It is still possible to reprogram it by JTAG, but it does not remove this lock. I spent half day playing with ST API functions and finally replaced the CPU.
3. It is not possible to erase/write to Data flash (B1) from Code Flash (B0) - I expected something like that, however documentation explicitly mentions that data Flash can be reprogrammed from application running from B0. FLASH_Erase simply hangs – documentation does not contain any hint that it must run from RAM.
