LIS3DH conflicting specification in datasheet

[ingfu]

Hi,

the LIS3DH datasheet (DocID17530 Rev 2) states on page 1 under Features:

"Embedded 32 levels of 16-bit data output FIFO".

However, on page 19, section 3.6 FIFO:

"The LIS3DH contains a 10-bit, 32-level FIFO"

Which statement is correct?

[Federica Bossi]

Hi @ingfu ,

Welcome to ST Community!

The sensor is 10 bit (it doesn't have mode 16bit as you can see from table 10 in the DS) but those 10 bits are represented on 16 left justified. So the FIFO is 10 bits but represented on 16.
The size of the FIFO is 32 samples so 32*16*3 but each sample is 10 bit left shifted to make it 16bit.

If my reply answered your question, please click on Accept as Solution at the bottom of this post. This will help other users with the same issue to find the answer faster

[ingfu]

Hi, in table 10 it is stated, that the sensor has three modes: Low-power mode
(8-bit data output), Normal mode (10-bit data output) and High-resolution mode (12-bit data output).

The datasheet states: "The LIS3DH contains a 10-bit, 32-level FIFO". So do 32*3 12-Bit samples fit into the buffer? or are they truncated?

[Federica Bossi]

Hi @ingfu ,

There are 10 bits per axis so they are 30-bit words, 32 words total. The confusion arises from the fact that these 10 bits are then read with 2 bytes.
Also the data read from the output registers are not 16 bits but at most 12 bits in HR mode, the 2 LSB are not flushed. If you are in Normal mode or Low Power mode those LSB would be 0.

If my reply answered your question, please click on Accept as Solution at the bottom of this post. This will help other users with the same issue to find the answer faster