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Some applications have the need to use an external interrupt from an GPIO input that is already configured as alternate function. My use case is to use EXTI on a rising edge of SPI_NSS input to detect a terminated SPI transfer on a slave.So I need the combination of MODE_AF and EXTI_IT when configuring the GPIO input pin. Unfortunately, HAL does not support this and asserts on IS_GPIO_MODE(__MODE__) for this combination.However, STM32 MCUs usually support this combination, so it makes sense to support this in HAL.To allow this, I added some definitions in stm32g4xx_hal_gpio.h:#define GPIO_MODE_AF_IT_RISING (MODE_AF | EXTI_IT | TRIGGER_RISING) /*!< Alternate Function with External Interrupt Mode with Rising edge trigger detection */ #define GPIO_MODE_AF_IT_FALLING (MODE_AF | EXTI_IT | TRIGGER_FALLING) /*!< Alternate Function with External Interrupt Mode with Falling edge trigger detection
I am trying to make the ADC channels sample the current through some motor channels synchronised to the center of the center aligned PWM waveform to avoid switching noise.The microcontroller I am using is the STM32F411 series, and I am using the first 3 channels of Timer 2 for PWM. The 4th channel is set to "Output compare no output", and I also set the timer trigger output event selection to Output compare (OC4REF). I set the pulse of channel 4 to the TOP value of the timer so it triggers when the counter counts to the TOP (midpoint of PWM). For the ADC, i am trying to sample 4 inputs (2 phases for 2 motors) and shift the data into a buffer using DMA. I enabled scan conversion mode as well as DMA continuous requests, and set the trigger source to Timer 2 capture compare 4 event, triggered on the rising edge. The ADC global interrupt is also enabled.In code, I started timer 2 using:HAL_TIM_Base_Start(&htim2); HAL_TIM_OC_Start(&htim2, TIM_CHANNEL_4);Then, I start the ADC us
Hello ST Community,I am currently working on a hardware integration project where a Xilinx ZCU104 FPGA acts as the SPI Master, and an STM32F446RE acts as the SPI Slave. We are attempting to establish a stable full-duplex SPI communication using DMA, but we are consistently encountering a "Communication Timeout" on the Master side, and the STM32 RxBuffer remains empty (all zeros).Here are the implementation details and the troubleshooting steps we have already verified:### 1. Configuration & Code Snippet* Data Size: 8-bit SPI data size, but grouped into 4-byte (32-bit) transfers to match the FPGA's 32-bit register data width.* STM32 SPI Configuration: Slave Mode, 2 Lines Full-Duplex, CPOL=0, CPHA=0 (Mode 0), MSB First.* NSS Management: Hardware NSS Input (SPI_NSS_HARD_INPUT) on PB12.* DMA Configuration: DMA1 Stream 3 (RX) and Stream 4 (TX) enabled with circular or normal transfer.In `main.c`, we initialize the peripheral and start the listening process as follows:```c#define BUFFER_
Hello,I’m working on a stm32h753 MCU and trying to use LwIP. I followed a lot of topics on that but I’m still not able to make it work.When I’m using debugger to identify issue, I’m always falling in unaligned access issue.backtrace in debugHere is my configuration :MPU_configvoid MPU_Config(void){ MPU_Region_InitTypeDef MPU_InitStruct = {0}; /* Disables the MPU */ HAL_MPU_Disable(); /* Configure the MPU as Strongly ordered for not defined regions */ MPU_InitStruct.Enable = MPU_REGION_ENABLE; MPU_InitStruct.BaseAddress = 0x00; MPU_InitStruct.Size = MPU_REGION_SIZE_4GB; MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS; MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE; MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE; MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE; MPU_InitStruct.Number = MPU_REGION_NUMBER0; MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0; MPU_InitStruct.SubRegionDisable = 0x87; MPU_InitStruct.DisableExec = MPU_INSTR
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I am currently using the NUCLEO-H7S3L8 CN2 Type-C port as a USB_OTG_HS embedded PHY host/source.The TCPP03 source path opens successfully, and both the USB stick attachment and port reset are working. After the reset, HPRT reads 0x00001005, which seems to indicate speed=HS and that the port is enabled.However, during the first EP0 SETUP GET_DESCRIPTOR request: HAL_HCD_HC_SubmitRequest() = HAL_OK HAINT = 0x00000001 HCINT = 0x00000080 TXERR = 1 xfer_count = 0 The exact same issue occurs even during a raw HAL EP0 smoke test, prior to involving USBX/FileX.I would like to verify the following points: What is the mandatory clock/power initialization sequence when using the USB_OTG_HS embedded PHY host on the H7S3L8? Is it acceptable to use HSI → PLL3Q for the USBPHYC clock, or is an HSE strictly required? What are the necessary settle/wait conditions after enabling USBHSREG? Are there any required CC/UCPD configurations for the CN2 Type-C/TCPP03 source setup, apart from the PM9
i am using stm32h753zi and stmcubeide is 1.10.1 .the eth dx and rx is 30000000 and 30000200 and heap is 30044000 and rcc- bypass and used tim6 .i did it like the examples and i got no out and finally got a working code from claude, but it works only untill the power line is connected after i remove and reconnect it stopped working or works for one ping and stops .i thought may be it was beacause i used ramd2 and used ramd1 it also stops working when this stops.someone pls help me fix this i am willing to start from scratch lwip i used static ip address and pc is in same subnet/* USER CODE BEGIN Header *//** ****************************************************************************** * @file : main.c * @brief : Main program body ****************************************************************************** * @attention * * Copyright (c) 2026 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICEN
Hi , Subject: i need to reduce the log write time what to do I have an STM32H503 logging ~20 bytes per line (HH:MM:SS , X.X) to a 24Cxx EEPROM over I2C @ 400 kHz, with FAT12 + USB MSC.Blocking time = the main loop stalls ~100–200 ms on each append while EEPROM writes finish.Each line only adds ~20 B of text, but my FAT code does full 512 B sector read-modify-write on the data sector, again on the root directory (file size), plus metadata read/write.That’s ~1 KB+ programmed per line (many 64 B page programs), so EEPROM ACK/program time dominates — not the 20 B payload or I2C speed alone.Basic issue: small appends through sector-based FAT on page EEPROM → huge writes per line.I’m thinking: defer root/meta to session end (back button), RAM cache, write only dirty 64 B pages.Is that the right fix? Can others get ~20–50 ms/line on 24Cxx without dropping FAT?
As per my custom board pins(I am using single QUADSPI STR) I have selected and i tried to flash via Cube-Programmer CLIVEONE - MT25QL512_STM32H7XX-PB2-PB10-PF8-PF9-PF7-PF6.stldrhttps://github.com/cturvey/stm32extldr/blob/main/h7_mt25ql512a/CLIVEONE-MT25QL512_STM32H7XX-PB2-PB10-PF8-PF9-PF7-PF6.stldrISSUE : flash protection enabled https://github.com/cturvey/stm32extldr/tree/main/h7_mt25ql512aISSUE: I have tried with this external loader but i am not able to erase memory
When I compile my code, I get strange errors that make no sense.#define ADC_BUFFER 1000 gives error "expected declaration specifiers or '...' before numeric constant"even though the line above it #define ADC_HIGH_THRESHOLD 3500 doesn't generate an error.HAL_TIM_Base_Start(&htim3); and HAL_ADC_Start_DMA(&hadc1, (uint32_t*)adc_buffer, ADC_BUFFER); both generate "Syntax error".The TIM and ADC Start errors expanded error message is: error: expected declaration specifiers or '...' before '&' token /* USER CODE END Header *//* Includes ------------------------------------------------------------------*/#include "main.h"/* Private includes ----------------------------------------------------------*//* USER CODE BEGIN Includes */#include <stdlib.h>#include <stdio.h>#include <stdbool.h>#include <stdint.h>#include <inttypes.h>#include "globals.h"/* USER CODE END Includes *//* Private typedef -----------------------------------------------------------*//
Environment & hardware:STM32F722RET6:LQFP64USB3300EZKSTM32CubeIDE v2.1.1STM32CubeMX v6.17.0Windows 11 OS Description of problem:I am trying to use ULPI with external HS USB phy with the follwing schematic:when calling MX_USB_DEVICE_Init(), it will be stuck at /* Required few clock cycles before accessing USB PHY Controller Registers */for (volatile uint32_t i = 0; i < 10; i++) { __NOP(); // No Operation instruction to create a delay} /* Core Soft Reset */ USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST; do { count++; if (count > HAL_USB_TIMEOUT) { return HAL_TIMEOUT; } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST); return HAL_OK;}in USB_CoreReset(), eventually returning HAL_TIMEOUT. Images of USBx and RCC:USBx before core soft resetUSBx after soft core resetRCC before & after soft core resetMy clock configuration, everything not included in this image is greyed outULPI pins: /**USB_OTG_HS GPIO Configuration PC0
Could you please let me know when STM32 CubeMX 2 is expected to support USB device and host middleware?Also, will STM32H, STM32F, and other STM32 series continue to be supported in CubeMX 2?
Implementation: STM32F405, using Timer 2 to synchronously trigger ADC1 and ADC2 acquisition with DMA.Problem: The sampling frequencies of ADC1 and ADC2 are correct, but the phase difference keeps changing for each acquisition – they are not sampling synchronously, and the captured waveform does not match what is observed on the oscilloscope.Question: 1,How can I debug and resolve this issue?2, I found that I must call HAL_ADC_Start(&hadc2) before HAL_ADCEx_MultiModeStart_DMA(&hadc1, ...); Is this correct? HAL_ADC_Start(&hadc2); HAL_ADCEx_MultiModeStart_DMA(&hadc1,(uint32_t*)adc_dma_buf,POINTS_PER_CH);Specific code: /* USER CODE BEGIN Header *//** ****************************************************************************** * @file : main.c * @brief : Main program body ****************************************************************************** * @attention * * Copyright (c) 2026 STMicroelectronics. * All rights reserved. * * This
I’m seeing that the X-CUBE-FREERTOS packege is being updated to 1.6.0 to support FreeRTOS 11.2From the changelog it says that it’s restricted to - Restricted to processor vendor: STMicroelectronics:13 - Restricted to processor name matching: STM32H5*|STM32U5*|STM32C0*|STM32WBA*|STM32U0*|STM32N6*|STM32U3*Are there any plans to bring to STM32H7* as well?
Hello,I'm looking for advice / help with Trust-Zone enabled project. I'm just getting started with Trust-Zone so there is a bit of a learning curve I guess, and a lot I dont know. I'm debugging in VSCode. Debug config shown at bottom of message. To start, I programmed TZEN for my STM32U575 to 1, but no read out protection is enabled. The secure part of the project, which runs first (its ISR table is at 0xc000000 ) only does a handful of things currently, including running this - it is stock standard STM code I think.static void NonSecure_Init(void) { funcptr_NS NonSecure_ResetHandler; SCB_NS->VTOR = VTOR_TABLE_NS_START_ADDR; /* Set non-secure main stack (MSP_NS) */ __TZ_set_MSP_NS((*(uint32_t *)VTOR_TABLE_NS_START_ADDR)); /* Get non-secure reset handler */ NonSecure_ResetHandler = (funcptr_NS)(*((uint32_t *)((VTOR_TABLE_NS_START_ADDR) + 4U))); /* Start non-secure state software application */ NonSecure_ResetHandler(); } When I start
Hello there!It would be really great if someone can look into this.I even tested it by reading the state of the pin and the MCU detected when the button was pressed, however when I set it up to use EXTI, its not detecting the interrupt. Could there be something wrong with the IC?Any help would be greatly appreciated. /* USER CODE BEGIN Header */ /** ****************************************************************************** * @file : main.c * @brief : Main program body ****************************************************************************** * @attention * * Copyright (c) 2024 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICENSE file * in the root directory of this software component. * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ /* USER CODE END Header */ /* Includes ---------
Hello, I am trying to setup TIM5 channel 1 to output a signal on its output pin. I generated the code using STM32CubeMX2. I am getting an assert failed during initialization.mx_system_init() calls mx_tim5_init() which calls HAL_TIM_OC_SetConfigChannel(): oc_config.polarity = HAL_TIM_OC_HIGH; oc_config.idle_state = HAL_TIM_OC_IDLE_STATE_RESET; if (HAL_TIM_OC_SetConfigChannel(&hTIM5, HAL_TIM_CHANNEL_1, &oc_config) != HAL_OK) { return NULL; } In HAL_TIM_OC_SetConfigChannel function assert fails at the following line: ASSERT_DBG_PARAM(IS_TIM_OC_OVERRIDE_STATE(p_config->override_state)); ASSERT_DBG_PARAM(IS_TIM_OC_BREAK_MODE(p_config->break_mode));The value of the override_state shown by the debugger is: (HAL_TIM_OC_OVERRIDE_SET | unknown: 0xfa). If I comment out the assert it will assert on the next line (break_mode). If I comment that line out as well the code outputs a signal on the pin. I attached my MX2 file. What am I missing?-Gil
Hi everyone, I have successfully set up a camera and the NPU working together on a Nucleo N6 to get proper outputs from the latter, which is great. I also have a way to see the image and can verify the outputs live.However, that only works when I launch the firmware by adding the Application to the startup, loading its symbols, flashing the trusted application and starting to debug the FSBL… After that starts, I can detach the debugger to let it run the application. (BOOT0 off, BOOT1 on)When I now flash both trusted binaries and launch without the debugger (BOOT0 and BOOT1 off) it starts normally and I see the live image. But there are no inference results (which takes the same amount of time as when it worked)… What could I be missing?Best regards, rphii
Hello,I am facing an issue with the STM32C5 HAL SPI driver related to CRC error detection.In my setup, CRC is enabled for SPI. When a CRC error occurs, I can observe that the CRCERR flag is set before the transfer is closed. However, the CRC error is never reported via the HAL error callback.Looking into the HAL implementation, I noticed the following behavior:SPI_CloseTransfer() calls LL_SPI_Disable()After disabling SPI, SPI_CloseTransfer() checks LL_SPI_IsActiveFlag_CRCERR()When this check is performed after LL_SPI_Disable(), the CRC error is no longer detectedIf I move the LL_SPI_IsActiveFlag_CRCERR() check before LL_SPI_Disable(), the CRC error is detected correctlyAdditionally, in my case SPI_CloseTransfer() is called from HAL_SPI_IRQHandler(), but:the return value of SPI_CloseTransfer() is not evaluatedonly the Tx/Rx complete callback is invokedmy error callback is never called, even though a CRC error has occurredFrom my understanding:LL_SPI_Disable() itself does not clear the C
Hello,I am using a STM32G474 and the RTC is counting >24.I have setup the RTC with the STM32CubeMX. regards Mark,
My design requires a microSD with the G474RE MCU. The Eval board schematic shows the design and some code in the \driver\BSP. However, I do not see the application example. My requirements are to read and write multiple data files. Where can I find an example with these features? Any other eval examples I can port over?
Hello everyone, I'm having issues with the Heap of the LWIP that is used/full, and I can't do any mem_malloc. I have dig a bit on why the log of LWIP tells me that it couldn't allocate memory ("etharp_raw: could not allocate pbuf for ARP request"). As far as i understand, the mem_malloc used the struct mem *lfree variable to handle the allocation for the LWIP and which is the next/previous chuck and also if the next chunk is being used or not. struct mem { /** index (-> ram[next]) of the next struct */ mem_size_t next; /** index (-> ram[prev]) of the previous struct */ mem_size_t prev; /** 1: this area is used; 0: this area is unused */ u8_t used; #if MEM_OVERFLOW_CHECK /** this keeps track of the user allocation size for guard checks */ mem_size_t user_size; #endif }; My issue is that the variable used in the mem struct is never null or zero. Which lead to the mem_malloc to always return NULL even after a fresh upload or power
Hi, I’m working with FATFS + SDIO + USB mass storage class.But I can’t seem to get writing and as a consequence reading working.in my main.c I do: //fatfs test makeFileData("test12.txt", "TEST123"); char* data = readFileData("test12.txt"); printf("read data = %s\r\n", data); And in my console I get as a response:D-SH 0 /System Volume Information---- 209 /x1_DEFAULT.JSON---- 211 /x2_DEFAULT.JSON---- 211 /x3_DEFAULT.JSON---- 211 /Ik_heb_iets_verzonne.JSONTotal blocks: 1922016 (961 Mb)Free blocks : 1921888 (960 Mb)SD Card Block size = 512SD Card Block number = 1953792SD Card size = 1000341SD Card Version = 1Init WVR complete!f_write failed: 1read data = So It can open the card and perform a ls command, but for some reason I can’t write. I spotted that some people look at DMA but I’m not using DMA.My entire SD card Handler:/* * SD_Card_Handler.c * * Created on: June 24, 2026 * Author: william.vanraemdonck */#include "WVR/SD/SD_Card_Handler.h"#incl
Hello,I’m struggling using STM32_USB_Device_Library V2.10.I’m developing a device with storage, and I want to transfer files via USB to a Windows PC using MTP.I currently have a simple setup using STM32H7B3 eval board. I have made a test project with STM32_USB_Device_Library using the USB HS.I have come so far that the device is showing up on the PC, and I can read contents (files) from the dummy file system on the device (currently I just fake the file system). Files are showing up correctly in File Explorer. I have 5 files, from 1K to 5K size, on the device.But when I try to transfer the files to PC, I only get 16 bytes of data. Size of file is showing correct in Windows Explorer for the device, but for the transferred file, it is only 16 bytes. It also does not contain correct data, only a chunk of the first data in the file.I have used usbd_mtp_if_template.c as start, and implemented the functions for reading file system data.The USBD_MTP_Itf_ReadData() looks like this:static uint3
Hi,I encountered problems during the development process of using FMAC. To illustrate the problem simply, I used FMAC to implement an RC filter, by which I mean to illustrate the calculation problems of FMAC.RC filter:10K+10nFIts discrete z-domain expression:(Ts=1e-6,Tustin)so I get fixed-point parameters :I referred to the example program of AN5305 and used a 1-us timer to trigger ADC sampling. After the ADC sampling is completed, DMA writes to the WriteData of FMAC, and then the ReadData is processed in the interrupt as follows:As shown above, my current ADC sample is 0, and my Vref is set to 800. I think the output of FMAC as an RC filter should be around 800 in the DC case, but actually it is not. It is a relatively small value. Why is that?May I ask if there is a problem with my configuration of FMAC?
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