STM32 MCUs

Title edited to reflect that this relates specifically to the NUCLEO-G070RB board.NUCLEO-G070RB in this board  ADC channel 0,1 working ,other ADC channel not working is they any reason?

Mostly i have to use my device with battery. So i need to operate it as low-power as possible. When doing this low-power process(either standby-stop-or sleep deeep sleep etc. i have no experience about these modes), one ADC reading is critical for me. I always have to measure that  ADC reading. How should i create the logic? After makins some research, most of peripherals are disabled during standby(i can not verify this if it was true or not). I think that i need a wake-up source to exit standby-stop or sleep modes. How should i configure this wake-up mechanism? Firstly i was plannig to use ADC as an wake-up source but i am not sure if it was true or not? Can you guide me to better options?

Hi,I am building a program that can flash new firmware onto a STM32H743ZIT6 via CAN. It does so by utilizing the dual bank feature and ping-ponging between bank 1 and bank 2. It receives the firmware via CAN and buffers it. Before writing it to the inactive bank it first erases said bank.When running form bank 1 this works just fine and it is able to reboot to the newly flashed bank. When going from bank 2 back to bank 1 however, it encounters an issue. It crashes in the erase step and will not restart.After I manually disable the SWAP_BANK bit using STM32CubeProgrammer it runs again on bank 1 without flashing again. This (I think) tells me it is deleting bank 2 while also running on it.Attached you find the function in question, do you have any idea where i went wrong? void foc_erase_inactive_bank() { // Determine inactive bank from SWAP_BANK bit uint8_t inactive_bank = (FLASH->OPTCR & FLASH_OPTCR_SWAP_BANK) ? 1 : 2; uint32_t bank_to_erase = (inactive_bank == 1) ? FLASH

Hi all,I’m working on STM32U385 with OEMiRoT and following this ST wiki page:https://wiki.st.com/stm32mcu/wiki/Security:How_to_adapt_a_user_application_to_ROT_for_STM32U3However, I cannot see any of the images/diagrams in the page (they appear blank or missing).I tried different browsers (Chrome, Edge, Firefox) and different PCs, but the issue remains.Can someone confirm if the images are visible on their side, or if this is a known issue with the wiki page?The diagrams are quite important to understand the ROT/OEMiRoT flow and flash layout.Thanks in advance.Marco Giacomin    

Hello, The board revision I am using is MB1370-lcd-b02 a254300030. I am working with the STM32H7B3I-EVAL board and using TouchGFX (TouchGFX Designer). I have created a simple screen in TouchGFX, and: The simulation runs correctly on PC The project builds successfully in STM32CubeIDE The code flashes successfully to the board However, on hardware: The TFT backlight turns ON But no UI is displayed (screen is blank)

Hello All,On the STM32U575 is there any guidance regarding use of external resistors?  I don't see any on the reference design so I didn't put it on my board either.  USB data rates are fairly slow, is impedance matching even required?We are using TinyUSB so that we can avoid the RTOS and it works fine mostly, but occasional USB disconnects. We discovered by accident using a longer cable seems to resolve this. I am wondering if it is a fluke or if there is some rational reason for this.Thanks!

Hi,I am currently testing OEMiROT and I performed the following 3 tests.Test 1: Default example(Overwrite mode enabled + separate Secure and Non-Secure applications)How to start with OEMiRoT on STM32U3 - stm32mcuProject:OEMiROT_Appli_TrustZoneOEMiROT_BootConfiguration:#define MCUBOOT_OVERWRITE_ONLY /* Defined: FW installation uses overwrite method. Undefined: FW installation uses swap mode. */ #define MCUBOOT_APP_IMAGE_NUMBER 2 /* 1: S application only if FLASH_NS_PARTITION_SIZE = 0, otherwise S and NS binaries assembled in one single image. 2: Two separated images for S and NS applications. */ #define MCUBOOT_S_DATA_IMAGE_NUMBER 0 #define MCUBOOT_NS_DATA_IMAGE_NUMBER 0This test works correctly.Test 2:(Swap mode enabled + separate Secure and Non-Secure applications)Project:OEMiROT_Appli_TrustZoneOEMiROT_Boot/* #define MCUBOOT_OVERWRITE_ONLY */ /* Undefined: FW installation uses swap mode. */ #define MCUBOOT_APP_IMAGE_NUMBER 2 #define MCUBOOT_S_DATA_IMAGE_NUMBER 0 #define MCUBOOT

Device: STM32H7A3LIH6Q (TFBGA225) Tools: STM32CubeProgrammer v2.22, STLINK-V3MINIE, OpenOCD 0.12.0 IDE: STM32CubeIDE / HAL Custom PCB, 4 boards affected identicallySummaryAfter approximately 20 successful flash/debug cycles, all 4 of our custom boards became permanently unreachable via SWD. The MCU continues to run user code normally (UART/VCP output visible), VCAP voltage is nominal, but the ST-LINK cannot connect in any mode. The UART bootloader is functional and we can flash via UART. SWD remains dead even after mass erase with blank flash.Hardware ConfigurationVLXSMPS connected via 2.2µH inductor to VDDLDO and VFBSMPSVCAP decoupling caps presentNRST connected to STLINK-V3MINIEBOOT0 accessible and functionalNo USB connector on boardRoot Cause IdentifiedOur firmware was using the wrong power supply configuration:// Wrong — was in our code: HAL_PWREx_ConfigSupply(PWR_SMPS_1V8_SUPPLIES_EXT_AND_LDO); // Correct for our hardware topology: HAL_PWREx_ConfigSupply(PWR_SMPS_1V8_SUPPLIES_LDO

Hello everyone, I am currently working on a fully isolated motor driver using an STM32G474RE. I need to interface the AMC1301differential output to the MCU in a way that ensures accurate measurements. What is the best approach to achieve this? Also in mc workbench app, MCU opamp -> ADC hardware variant for Current sense -> InternalOpamps -> Differential -> InternalPGA. Or I will make the diff to single like in other picture wich looks easier. Also looks same with design below.    

I am planning to use STM32U083CC series MCU in my project and after inspecting datasheet there is a line "Vddusb should be preferably connected to Vdd when the USB is not used)". I know that Vddusb is independent from Vdd but is it omitted that i can not use Vdd for Vddusb? I mean should i need extra AMS1117 3.3 for instance to feed Vddusb?

I am experiencing an issue with ADC3 multi-channel scan mode on a custom STM32H745 board (LDO power supply). The same code works perfectly on the Nucleo-H745ZI reference board (SMPS power supply), but fails on my custom design. Problem Summary: ADC3 configured for 6-channel continuous scan with DMA circular mode Only channels 1-3 receive invalid data (changing values) Channels 4-6 are stuck at 0 (no change) When using single-channel with interrupt (polling mode), the ADC works fine All GPIO pins are correctly routed; multimeter confirms good analog signals on all 6 input pins Expected Behavior: All 6 ADC channels should update continuously via DMA circular buffer. Actual Behavior: adcValues[0] = 2604660662 // PF6 (IN8) - CHANGING ✓ adcValues[1] = 1343977801 // PF7 (IN3) - CHANGING ✓ adcValues[2] = 4294918112 // PF8 (IN7) - CHANGING ✓ adcValues[3] = 0 // PF9 (IN2) - STUCK ✗ adcValues[4] = 0 // PF10 (IN6) - STUCK ✗ adcValues[5] = 0 // PC0 (IN10) - STUCK ✗   HARDWARE CONFIGURATION

I am new to using the STM32H563, 64 pin package and am trying to implement Dallas 1 wire protocol with a UART.Initially I was going to use transmit and receive with diode back into Tx, but I saw example using the Half duplex mode of the UART and thought I would give that a go.However, whenever I change the USART1 pin to open drain (Pin 59 of 64 pin package), the line which is pulled up by a 4k7 resistor drops to about 200mV.  If I try to transmit with the UART, I can see the Open drain pulling from 200mV down to ground as the data goes through. If I place another 4k7 pullup in parallel, the voltage increases to 400mV.If I make the pin an input, the voltage goes up to 3.3V as expected.If I make the pin full duplex standard USART1 TX with PP pin, the voltage goes to 3.3V.I have removed all other components so it is just the processor pin itself, setting Open Drain just fails to give me a proper open drain, it seems to have something else loading the line.Both pullup and pulldown res

Hi everyone,I'm working on a project based on the following STM32H7 LwIP example:https://github.com/stm32-hotspot/STM32H7-LwIP-Examples/tree/main/STM32H747_Disco_M7_ETHIn addition to the Ethernet functionality, I’ve enabled the SAI peripheral with DMA to transmit audio via I2S. I’ve noticed a problem:When I run the SAI with DMA on the Cortex-M7 core using FreeRTOS, the audio stream contains gaps or dropouts.However, when I move the exact same SAI/DMA initialization and logic to the Cortex-M4 core, the audio output is perfect with no gaps.Has anyone experienced similar issues when using DMA for audio on the M7 core with FreeRTOS?Any suggestions would be greatly appreciated.Thanks in advance!TG808

There is a bug in the FW package V1.6.3 where the UART and DMA doesn't work correctly.I've been using FW package V1.6.2 for awhile with UART in DMA circular mode and it has never had an issue. I've recently made a copy of the project to make an A and B comparison because we needed to make some subtle changes. I migrated to the latest FW Package V1.6.3 for the B project.With V1.6.3, when receiving a string command, i only receive a few character from the beginning of the string and the last few characters from the end of the string. A bunch of characters are missed from the middle of the string.  I decided to go back to FW package V1.6.2 in CubeMX because that is the only thing that really changed and generated the code. The project works correctly. What i see in V1.6.3 are a lot of missing huart->TxXferCount = 0U; and huart->RxXferCount = 0U;  throughout the stm32g0xx_hal_uart.c file compared to V1.6.2In WinMerge you can see in the lef

Question about using livetune when using a 4 channel sys input.We have a 4 channel PDM mic input but having trouble figuring out how to get the individual channels. For example if I wanted to delay just ch 1, how would I go about that. I don't really see a way to get access to the individual channels. deinterleave seems to be the useful but how do I know ch 0, ch 1 ... are going to which deinterleave output if i fact deinterleave is the correct element.We are trying to do some beam forming with 4 channels if that helps. [removed label 'CubeIDE' as this is about audio and X-CUBE-AUDIO-KIT software - p.a.]

Hello,We are currently performing tests on stepper motor driver boards.We are using a NUCLEO-F401RE board, which works correctly with the X-NUCLEO-IHM14A1: the motor rotates normally using the interface provided by STSPIN Studio 2.0.However, while keeping the same NUCLEO-F401RE board and replacing the X-NUCLEO-IHM14A1 with an evaluation board based on the STSPIN948, we are unable to make the motor rotate. The motor produces a whistling and mechanical noise, but no rotation occurs.The following configurations have been applied       - J5 = 1       - J6 = 1       - J7 = 0In addition:       - Modifications to REFA and REFB have no effect on the motor behavior.       - Changing parameters in STSPIN Studio 2.0 does not seem to affect the board.       - Using an oscilloscope, we verified that the phase shift between signals A and B is correctly set to 90°.Could you please h

Hello everyone, I have my own custom board based on the STM32WLE5CC , and I want to build a LoRaWAN project on it. For the RF design, I used the MB1874-LP reference schematic as a base, together with the BALFHB-WL-06D3 balun/filter for a 2-layer PCB, following application note AN6322. I also studied AN5407 and AN5757, and for LoRaWAN specifically AN5406, as well as this video: https://www.youtube.com/watch?v=hJFv4RbN878 The main issue is that almost all available materials only explain how to use the ready-made End_Node example project. At the moment, I am also studying UM2643. Could you please tell me specifically what else I should study for this topic? Maybe I have missed some important materials or documentation related to developing a custom STM32WLE5CC LoRaWAN firmware from scratch. I also have one more hardware-related question:I accidentally swapped the positions of L3 and C26 in the RF matching network (see screenshot). Could this cause TX power loss or reduce RX sensitivity?

Hi,I am planning to use an STM32N6 in a project where I need a real-time clock (RTC).My goal is to run the RTC with minimal power consumption. As far as I understand, this involves using the V_BAT domain, where the microcontroller is supplied through the dedicated backup supply pins.In my application, only the RTC needs to be running, while the rest of the system should be completely inactive. The main supply voltage will be absent most of the time.According to the datasheet, I end up with a current consumption of about 40.5 µA at 25 °C in this configuration. This seems quite high, especially when targeting a lifetime of around 5 years.Since it appears that only a small portion of this current is actually used by the RTC itself, I am wondering if there are ways to further optimize the configuration to reach something closer to 1 µA or below.I would really appreciate any tips, best practices, or measurement results.Best regards,Marius

Hi, newbie here - I have some experience with the f4 series, but am working on a small project for which I would like to try a stm32u0 MCU. Looking at the stm32u031 20-pin TSSOP, I am confused by something. When I load this MCU in cubeMX, and tick on I2C 1, I see a single pin 'light up' for both SCL and SDA. The datasheet implies I should be able to choose a pin with an alternate function for one of these, but I can't figure out how I might do this....I see pin PA8 seems to have an alternate mapping to PA9, which seems like it might work for i2cSCL, but I don't know how to select it. I feel like an ***, but I'm unsure how to configure this using cubeMX, or how one is meant to work with these apparently-double-functioned pins? Thanks!

Product: STM32H755ZI (Nucleo-H755ZI-Q, nucleo_h755zi_q/stm32h755xx/m4)Core under test: Cortex-M4 (CM4, CPU2), running at 240 MHz (D2 domain clock)RTOS: Zephyr RTOS (west build system, Zephyr SDK)Toolchain: arm-zephyr-eabi-gcc (Zephyr SDK)I am benchmarking different SRAMs on the CM4 core of the STM32H755 and measuring memory access latency across the available SRAM regions using k_cycle_get_64() (Zephyr cycle counter, backed by DWT CYCCNT). My benchmark allocates identically-sized and identically-aligned buffers in SRAM1 (0x30004000), SRAM2 (0x30020000), and SRAM3 (0x30040000) then performs the same read/write pattern against each.Observation: SRAM2 read access from the CM4 is measurably and reproducibly faster than SRAM1 read access by 1 cycle per 32-bit word, as measured via k_cycle_get_64() (backed by DWT CYCCNT). SRAM1 and SRAM3 exhibit the same read latency as each other. Write cycles are uniform across all three SRAMs. This behavior is consistent across multiple runs with the CM7

Hello,I am using the STM32H7B3I-EVAL board with STM32H7B3LIH6Q controller.The board revision I am using is MB1370-lcd-b02 a254300030.I downloaded the official demo package from the ST website:STM32H7B3I-EVAL → Tools & Software → Demo Code Package.After extracting the ZIP file, I tried flashing the provided  .hex demo file into the controller using STM32CubeProgrammer.However, programming fails with the following errors:Error: failed to download Sector[0]Error: failed to download the FileThe board is detected correctly through ST-LINK, and connection is successful. I already tried:Reducing SWD frequencyFull chip eraseHardware reset / Under reset modeBut the issue still occurs.Could anyone please suggest:Whether the provided demo .hex file is directly compatible with STM32H7B3LIH6Q?If any special option bytes or external memory configuration is required?Whether the demo depends on external QSPI/OSPI memory or specific boot settings?Thank you.   

We are using MPN: STM32U375VGT6Q in one of our projects, with the internal RC oscillator configured as the core clock source.During board validation, when the system clock was configured to the maximum frequency of 96 MHz, we observed a signal integrity issue. Specifically, the SPI clock signal (96 MHz / 2) does not return properly to the 0V base level,To rule out any PCB trace-related effects, we measured the signal directly at the MCU pin.as attached. Please help us with the necessary resolution for the issue observed.

We are considering a system configuration in which a model created in Simulink is programmed onto an STM32 microcontroller, and CAN communication (both transmission and reception) is performed.In this context, we would like to ask for your recommendations regarding:STM32CubeMX configuration required for CAN communicationKey hardware wiring points and precautions when using CANWe would appreciate it if you could share any recommended settings or best practices from STMicroelectronics.In particular, we would be grateful for your advice on any points to consider regarding consistency between CubeMX configuration/initialization code and code generated using Simulink and Embedded Coder.

hello ST Community,I'm trying to protect sector 0 of the flash drive from mass erasure using the PCCOP Protection option on the NUCLEO-H755ZI-Q.After tinkering around a bit to understand its functions, I can no longer reset its protection to its default state. Currently, it looks like the one in the photo:When I try to set these valuesPROT_AREA_START1 = 0x0801FF00PROT_AREA_END1 = 0x080100FFwhich i believe are their default values, both in the RDP=0xAA and RDP=0xBB states, I get this error.How can I fix this? Is there a way to reset PCROP Protection to its default mode?Thanks for the support.

I was wondering what is that. I created a custom bootloader firmware and application firmware. But once I successfully uploaded. When I send application firmware resquest I do not receive application firmware responses. Why is that? what is that? do you recognize that?  The AA 01 00 00 BB is the application firmware request frame.  0xAA is the begining 0x01 is the length 0x00 is the frame request ID  0x00 is the checksum 0xBB is the end of the frame  Thanks for all.